JPH0821607B
A dynamic memory device comprising a refresh counter (12), a row circuit (14), and a column circuit (16). The dynamic memory device has a screening refresh mode for activating a circuit block (10) including the refresh counter (12), row circuit (14), and column circuit (16), in response to a signal...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A dynamic memory device comprising a refresh counter (12), a row circuit (14), and a column circuit (16). The dynamic memory device has a screening refresh mode for activating a circuit block (10) including the refresh counter (12), row circuit (14), and column circuit (16), in response to a signal other than a refresh address signal externally supplied. |
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