DMA TRANSFER DEVICE FOR IMAGE PROCESSOR
PURPOSE:To surely perform the DMA transfer of image data for every line by an arbitrary cycle, in a DMA transfer device for transferring the processed data in an image processor such as a facsimile equipment, etc. CONSTITUTION:On the output side of an image processing part 2, two line memories 3 and...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | JINNO TAIICHI OKUMURA TAKUSHI KAJITANI TETSUJI |
| description | PURPOSE:To surely perform the DMA transfer of image data for every line by an arbitrary cycle, in a DMA transfer device for transferring the processed data in an image processor such as a facsimile equipment, etc. CONSTITUTION:On the output side of an image processing part 2, two line memories 3 and 4 are provided in parallel. The image processing part 2 processes image data for every line and alternately writes the processed data in a first line memory 3 and a second line memory 4. When the data of a line is written in the first line memory 3, a DMA transfer to a frame memory 6 is performed for the data stored in the second line memory 4. If DMA nontransfer data is generated, a processing interruption signal PAGAIN is outputted from a DMA data generation part 5 and the reading operation of an image reading part 1 and the processing operation of the image processing part 2 are temporarily interrupted by a CPU 7. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH07254061A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH07254061A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH07254061A3</originalsourceid><addsrcrecordid>eNrjZFB38XVUCAly9At2cw1ScHEN83R2VXDzD1Lw9HV0d1UICPJ3dg0O9g_iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBuZGpiYGZoaOxsSoAQDT-yPT</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DMA TRANSFER DEVICE FOR IMAGE PROCESSOR</title><source>esp@cenet</source><creator>JINNO TAIICHI ; OKUMURA TAKUSHI ; KAJITANI TETSUJI</creator><creatorcontrib>JINNO TAIICHI ; OKUMURA TAKUSHI ; KAJITANI TETSUJI</creatorcontrib><description>PURPOSE:To surely perform the DMA transfer of image data for every line by an arbitrary cycle, in a DMA transfer device for transferring the processed data in an image processor such as a facsimile equipment, etc. CONSTITUTION:On the output side of an image processing part 2, two line memories 3 and 4 are provided in parallel. The image processing part 2 processes image data for every line and alternately writes the processed data in a first line memory 3 and a second line memory 4. When the data of a line is written in the first line memory 3, a DMA transfer to a frame memory 6 is performed for the data stored in the second line memory 4. If DMA nontransfer data is generated, a processing interruption signal PAGAIN is outputted from a DMA data generation part 5 and the reading operation of an image reading part 1 and the processing operation of the image processing part 2 are temporarily interrupted by a CPU 7.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS ; PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19951003&DB=EPODOC&CC=JP&NR=H07254061A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19951003&DB=EPODOC&CC=JP&NR=H07254061A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JINNO TAIICHI</creatorcontrib><creatorcontrib>OKUMURA TAKUSHI</creatorcontrib><creatorcontrib>KAJITANI TETSUJI</creatorcontrib><title>DMA TRANSFER DEVICE FOR IMAGE PROCESSOR</title><description>PURPOSE:To surely perform the DMA transfer of image data for every line by an arbitrary cycle, in a DMA transfer device for transferring the processed data in an image processor such as a facsimile equipment, etc. CONSTITUTION:On the output side of an image processing part 2, two line memories 3 and 4 are provided in parallel. The image processing part 2 processes image data for every line and alternately writes the processed data in a first line memory 3 and a second line memory 4. When the data of a line is written in the first line memory 3, a DMA transfer to a frame memory 6 is performed for the data stored in the second line memory 4. If DMA nontransfer data is generated, a processing interruption signal PAGAIN is outputted from a DMA data generation part 5 and the reading operation of an image reading part 1 and the processing operation of the image processing part 2 are temporarily interrupted by a CPU 7.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</subject><subject>PHYSICS</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1995</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB38XVUCAly9At2cw1ScHEN83R2VXDzD1Lw9HV0d1UICPJ3dg0O9g_iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBuZGpiYGZoaOxsSoAQDT-yPT</recordid><startdate>19951003</startdate><enddate>19951003</enddate><creator>JINNO TAIICHI</creator><creator>OKUMURA TAKUSHI</creator><creator>KAJITANI TETSUJI</creator><scope>EVB</scope></search><sort><creationdate>19951003</creationdate><title>DMA TRANSFER DEVICE FOR IMAGE PROCESSOR</title><author>JINNO TAIICHI ; OKUMURA TAKUSHI ; KAJITANI TETSUJI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH07254061A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1995</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</topic><topic>PHYSICS</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><toplevel>online_resources</toplevel><creatorcontrib>JINNO TAIICHI</creatorcontrib><creatorcontrib>OKUMURA TAKUSHI</creatorcontrib><creatorcontrib>KAJITANI TETSUJI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JINNO TAIICHI</au><au>OKUMURA TAKUSHI</au><au>KAJITANI TETSUJI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DMA TRANSFER DEVICE FOR IMAGE PROCESSOR</title><date>1995-10-03</date><risdate>1995</risdate><abstract>PURPOSE:To surely perform the DMA transfer of image data for every line by an arbitrary cycle, in a DMA transfer device for transferring the processed data in an image processor such as a facsimile equipment, etc. CONSTITUTION:On the output side of an image processing part 2, two line memories 3 and 4 are provided in parallel. The image processing part 2 processes image data for every line and alternately writes the processed data in a first line memory 3 and a second line memory 4. When the data of a line is written in the first line memory 3, a DMA transfer to a frame memory 6 is performed for the data stored in the second line memory 4. If DMA nontransfer data is generated, a processing interruption signal PAGAIN is outputted from a DMA data generation part 5 and the reading operation of an image reading part 1 and the processing operation of the image processing part 2 are temporarily interrupted by a CPU 7.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_JPH07254061A |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION |
| title | DMA TRANSFER DEVICE FOR IMAGE PROCESSOR |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-20T10%3A00%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JINNO%20TAIICHI&rft.date=1995-10-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH07254061A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |