ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY

PURPOSE:To reduce the memory capacity of an EEPROM including data high rewriting frequency as an extremely small part of writing data. CONSTITUTION:An address detecting circuit 12 detects whether a specified writing address is an address in a prescribed range or not, and when the address is included...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: UENOYAMA HIROMI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator UENOYAMA HIROMI
description PURPOSE:To reduce the memory capacity of an EEPROM including data high rewriting frequency as an extremely small part of writing data. CONSTITUTION:An address detecting circuit 12 detects whether a specified writing address is an address in a prescribed range or not, and when the address is included in the prescribed range as a detected result, judges that data to be written have high rewriting frequency. The same three pairs of data D7 to D10 are prepared by a data preparing circuit 11 and overlappedly written in three memory cells A0, A0', A0''. At the time of reading, data are respectively read out from respective memory cells A0, A0', A0'' and data determined by majority through a majority logic circuit 15 are outputted as reading data.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH0683716A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH0683716A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH0683716A3</originalsourceid><addsrcrecordid>eNrjZNB29XF1DgnydHb08YlUCHIND_IMcXTycVXw8_fTDfP3cQzxBHJ8XX39gyJ5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakm8V4CHgZmFsbmhmaMxEUoAU-slDw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY</title><source>esp@cenet</source><creator>UENOYAMA HIROMI</creator><creatorcontrib>UENOYAMA HIROMI</creatorcontrib><description>PURPOSE:To reduce the memory capacity of an EEPROM including data high rewriting frequency as an extremely small part of writing data. CONSTITUTION:An address detecting circuit 12 detects whether a specified writing address is an address in a prescribed range or not, and when the address is included in the prescribed range as a detected result, judges that data to be written have high rewriting frequency. The same three pairs of data D7 to D10 are prepared by a data preparing circuit 11 and overlappedly written in three memory cells A0, A0', A0''. At the time of reading, data are respectively read out from respective memory cells A0, A0', A0'' and data determined by majority through a majority logic circuit 15 are outputted as reading data.</description><edition>5</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19940325&amp;DB=EPODOC&amp;CC=JP&amp;NR=H0683716A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19940325&amp;DB=EPODOC&amp;CC=JP&amp;NR=H0683716A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>UENOYAMA HIROMI</creatorcontrib><title>ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY</title><description>PURPOSE:To reduce the memory capacity of an EEPROM including data high rewriting frequency as an extremely small part of writing data. CONSTITUTION:An address detecting circuit 12 detects whether a specified writing address is an address in a prescribed range or not, and when the address is included in the prescribed range as a detected result, judges that data to be written have high rewriting frequency. The same three pairs of data D7 to D10 are prepared by a data preparing circuit 11 and overlappedly written in three memory cells A0, A0', A0''. At the time of reading, data are respectively read out from respective memory cells A0, A0', A0'' and data determined by majority through a majority logic circuit 15 are outputted as reading data.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB29XF1DgnydHb08YlUCHIND_IMcXTycVXw8_fTDfP3cQzxBHJ8XX39gyJ5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakm8V4CHgZmFsbmhmaMxEUoAU-slDw</recordid><startdate>19940325</startdate><enddate>19940325</enddate><creator>UENOYAMA HIROMI</creator><scope>EVB</scope></search><sort><creationdate>19940325</creationdate><title>ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY</title><author>UENOYAMA HIROMI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH0683716A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>UENOYAMA HIROMI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>UENOYAMA HIROMI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY</title><date>1994-03-25</date><risdate>1994</risdate><abstract>PURPOSE:To reduce the memory capacity of an EEPROM including data high rewriting frequency as an extremely small part of writing data. CONSTITUTION:An address detecting circuit 12 detects whether a specified writing address is an address in a prescribed range or not, and when the address is included in the prescribed range as a detected result, judges that data to be written have high rewriting frequency. The same three pairs of data D7 to D10 are prepared by a data preparing circuit 11 and overlappedly written in three memory cells A0, A0', A0''. At the time of reading, data are respectively read out from respective memory cells A0, A0', A0'' and data determined by majority through a majority logic circuit 15 are outputted as reading data.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPH0683716A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
title ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T09%3A10%3A35IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=UENOYAMA%20HIROMI&rft.date=1994-03-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH0683716A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true