SIGNAL CONTROL CIRCUIT

PURPOSE:To obtain a signal control circuit in which a rising time of a control signal is optionally controlled externally. CONSTITUTION:Sources of transistors(TRs) 5, 7 are connected in common to an input terminal 1 and gates are connected in common to a control signal input terminal 3, a drain of t...

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Bibliographische Detailangaben
Hauptverfasser: ARIGA RIE, MICHIYAMA JIYUNJI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To obtain a signal control circuit in which a rising time of a control signal is optionally controlled externally. CONSTITUTION:Sources of transistors(TRs) 5, 7 are connected in common to an input terminal 1 and gates are connected in common to a control signal input terminal 3, a drain of the TR 5 connects to an output terminal 2 and a drain of the TR 7 connects to a clock input terminal 4 via a capacitor 9. Furthermore, the drain and the gate of the TR 7 are connected together via a diode means 8. Since a level of a control signal is boosted by an external clock signal, the rising time of the control signal inputted to the TR 5 is optionally controlled by using the clock signal from the clock input terminal 4.