SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF

PURPOSE:To micronize an element restraining a buried contact layer from diffusing below an element isolating selection oxide film by a method wherein a diffusion layer loaded with conductive impurities is formed under the buried contact layer. CONSTITUTION:A buried contact layer and a MOS-type trans...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: MIZUNO TATSUO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator MIZUNO TATSUO
description PURPOSE:To micronize an element restraining a buried contact layer from diffusing below an element isolating selection oxide film by a method wherein a diffusion layer loaded with conductive impurities is formed under the buried contact layer. CONSTITUTION:A buried contact layer and a MOS-type transistor formed adjacent to it are composed of a P-type silicon substrate 101, an element isolating selective oxide film 102, a first stopper layer 103, a silicon oxide film 104, an opening 105, a second stopper layer 106, a polycrystalline silicon wiring layer 107, and a buried contact layer 108. As the buried contact layer 108 is restrained from diffusing below the element isolating selective oxide film 102, the two buried contact layers 108 adjacent to the element isolating selective oxide film 102 can be electrically insulated from each other even when the element isolating selective oxide film 102 is shortened in space, and thus a semiconductor device can be micronized. As a stopper can be dispensed with at selective oxidation, a process can be shortened and the semiconductor device can be lessened in manufacturing cost.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH06349941A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH06349941A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH06349941A3</originalsourceid><addsrcrecordid>eNrjZNAJdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HX0C3VzdA4JDXJVCPFwDXL1d-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAR4GZsYmlpYmho7GxKgBAKlQJYc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF</title><source>esp@cenet</source><creator>MIZUNO TATSUO</creator><creatorcontrib>MIZUNO TATSUO</creatorcontrib><description>PURPOSE:To micronize an element restraining a buried contact layer from diffusing below an element isolating selection oxide film by a method wherein a diffusion layer loaded with conductive impurities is formed under the buried contact layer. CONSTITUTION:A buried contact layer and a MOS-type transistor formed adjacent to it are composed of a P-type silicon substrate 101, an element isolating selective oxide film 102, a first stopper layer 103, a silicon oxide film 104, an opening 105, a second stopper layer 106, a polycrystalline silicon wiring layer 107, and a buried contact layer 108. As the buried contact layer 108 is restrained from diffusing below the element isolating selective oxide film 102, the two buried contact layers 108 adjacent to the element isolating selective oxide film 102 can be electrically insulated from each other even when the element isolating selective oxide film 102 is shortened in space, and thus a semiconductor device can be micronized. As a stopper can be dispensed with at selective oxidation, a process can be shortened and the semiconductor device can be lessened in manufacturing cost.</description><edition>5</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19941222&amp;DB=EPODOC&amp;CC=JP&amp;NR=H06349941A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19941222&amp;DB=EPODOC&amp;CC=JP&amp;NR=H06349941A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MIZUNO TATSUO</creatorcontrib><title>SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF</title><description>PURPOSE:To micronize an element restraining a buried contact layer from diffusing below an element isolating selection oxide film by a method wherein a diffusion layer loaded with conductive impurities is formed under the buried contact layer. CONSTITUTION:A buried contact layer and a MOS-type transistor formed adjacent to it are composed of a P-type silicon substrate 101, an element isolating selective oxide film 102, a first stopper layer 103, a silicon oxide film 104, an opening 105, a second stopper layer 106, a polycrystalline silicon wiring layer 107, and a buried contact layer 108. As the buried contact layer 108 is restrained from diffusing below the element isolating selective oxide film 102, the two buried contact layers 108 adjacent to the element isolating selective oxide film 102 can be electrically insulated from each other even when the element isolating selective oxide film 102 is shortened in space, and thus a semiconductor device can be micronized. As a stopper can be dispensed with at selective oxidation, a process can be shortened and the semiconductor device can be lessened in manufacturing cost.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HX0C3VzdA4JDXJVCPFwDXL1d-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAR4GZsYmlpYmho7GxKgBAKlQJYc</recordid><startdate>19941222</startdate><enddate>19941222</enddate><creator>MIZUNO TATSUO</creator><scope>EVB</scope></search><sort><creationdate>19941222</creationdate><title>SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF</title><author>MIZUNO TATSUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH06349941A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MIZUNO TATSUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MIZUNO TATSUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF</title><date>1994-12-22</date><risdate>1994</risdate><abstract>PURPOSE:To micronize an element restraining a buried contact layer from diffusing below an element isolating selection oxide film by a method wherein a diffusion layer loaded with conductive impurities is formed under the buried contact layer. CONSTITUTION:A buried contact layer and a MOS-type transistor formed adjacent to it are composed of a P-type silicon substrate 101, an element isolating selective oxide film 102, a first stopper layer 103, a silicon oxide film 104, an opening 105, a second stopper layer 106, a polycrystalline silicon wiring layer 107, and a buried contact layer 108. As the buried contact layer 108 is restrained from diffusing below the element isolating selective oxide film 102, the two buried contact layers 108 adjacent to the element isolating selective oxide film 102 can be electrically insulated from each other even when the element isolating selective oxide film 102 is shortened in space, and thus a semiconductor device can be micronized. As a stopper can be dispensed with at selective oxidation, a process can be shortened and the semiconductor device can be lessened in manufacturing cost.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPH06349941A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-15T05%3A18%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MIZUNO%20TATSUO&rft.date=1994-12-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH06349941A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true