ANALOG SWITCH CIRCUIT
PURPOSE:To reduce a crosstalk noise between nodes of a transistor (TR) for a switch element and a ground noise appearing at both nodes by providing a switch control circuit having a specific function to the circuit. CONSTITUTION:A drain and a source of a switch element use NMOS TR TN are connected b...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | OIKAWA NAOKI KAWACHI MASAHARU |
description | PURPOSE:To reduce a crosstalk noise between nodes of a transistor (TR) for a switch element and a ground noise appearing at both nodes by providing a switch control circuit having a specific function to the circuit. CONSTITUTION:A drain and a source of a switch element use NMOS TR TN are connected between a 1st node 11 and a 2nd node 12. A switch control circuit 10 is made up of switch drive NMOS TRs N1,N2, a pullup PMOS TR P3, a delay element DL, and a 2-input NOR circuit 16. The switch control circuit 10 has a capacitive component required to set a gate capacitance of the switch element TR TN to be a required capacitance. Then a gate potential of the switch element TR TN is controlled in plural timings based on a switch control input Sin inputted to a control input node 14. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH06252728A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH06252728A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH06252728A3</originalsourceid><addsrcrecordid>eNrjZBB19HP08XdXCA73DHH2UHD2DHIO9QzhYWBNS8wpTuWF0twMim6uQHnd1IL8-NTigsTk1LzUknivAA8DMyNTI3MjC0djYtQAAJlIHxU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ANALOG SWITCH CIRCUIT</title><source>esp@cenet</source><creator>OIKAWA NAOKI ; KAWACHI MASAHARU</creator><creatorcontrib>OIKAWA NAOKI ; KAWACHI MASAHARU</creatorcontrib><description>PURPOSE:To reduce a crosstalk noise between nodes of a transistor (TR) for a switch element and a ground noise appearing at both nodes by providing a switch control circuit having a specific function to the circuit. CONSTITUTION:A drain and a source of a switch element use NMOS TR TN are connected between a 1st node 11 and a 2nd node 12. A switch control circuit 10 is made up of switch drive NMOS TRs N1,N2, a pullup PMOS TR P3, a delay element DL, and a 2-input NOR circuit 16. The switch control circuit 10 has a capacitive component required to set a gate capacitance of the switch element TR TN to be a required capacitance. Then a gate potential of the switch element TR TN is controlled in plural timings based on a switch control input Sin inputted to a control input node 14.</description><edition>5</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940909&DB=EPODOC&CC=JP&NR=H06252728A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940909&DB=EPODOC&CC=JP&NR=H06252728A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OIKAWA NAOKI</creatorcontrib><creatorcontrib>KAWACHI MASAHARU</creatorcontrib><title>ANALOG SWITCH CIRCUIT</title><description>PURPOSE:To reduce a crosstalk noise between nodes of a transistor (TR) for a switch element and a ground noise appearing at both nodes by providing a switch control circuit having a specific function to the circuit. CONSTITUTION:A drain and a source of a switch element use NMOS TR TN are connected between a 1st node 11 and a 2nd node 12. A switch control circuit 10 is made up of switch drive NMOS TRs N1,N2, a pullup PMOS TR P3, a delay element DL, and a 2-input NOR circuit 16. The switch control circuit 10 has a capacitive component required to set a gate capacitance of the switch element TR TN to be a required capacitance. Then a gate potential of the switch element TR TN is controlled in plural timings based on a switch control input Sin inputted to a control input node 14.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB19HP08XdXCA73DHH2UHD2DHIO9QzhYWBNS8wpTuWF0twMim6uQHnd1IL8-NTigsTk1LzUknivAA8DMyNTI3MjC0djYtQAAJlIHxU</recordid><startdate>19940909</startdate><enddate>19940909</enddate><creator>OIKAWA NAOKI</creator><creator>KAWACHI MASAHARU</creator><scope>EVB</scope></search><sort><creationdate>19940909</creationdate><title>ANALOG SWITCH CIRCUIT</title><author>OIKAWA NAOKI ; KAWACHI MASAHARU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH06252728A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>OIKAWA NAOKI</creatorcontrib><creatorcontrib>KAWACHI MASAHARU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OIKAWA NAOKI</au><au>KAWACHI MASAHARU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ANALOG SWITCH CIRCUIT</title><date>1994-09-09</date><risdate>1994</risdate><abstract>PURPOSE:To reduce a crosstalk noise between nodes of a transistor (TR) for a switch element and a ground noise appearing at both nodes by providing a switch control circuit having a specific function to the circuit. CONSTITUTION:A drain and a source of a switch element use NMOS TR TN are connected between a 1st node 11 and a 2nd node 12. A switch control circuit 10 is made up of switch drive NMOS TRs N1,N2, a pullup PMOS TR P3, a delay element DL, and a 2-input NOR circuit 16. The switch control circuit 10 has a capacitive component required to set a gate capacitance of the switch element TR TN to be a required capacitance. Then a gate potential of the switch element TR TN is controlled in plural timings based on a switch control input Sin inputted to a control input node 14.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_JPH06252728A |
source | esp@cenet |
subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
title | ANALOG SWITCH CIRCUIT |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T19%3A32%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=OIKAWA%20NAOKI&rft.date=1994-09-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH06252728A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |