OPERATION OF CACHE MEMORY

PURPOSE:To eliminate structural overhead and to transfer data to a host computer at high speed by counting the number of times for accessing data which is slightly larger than a reference value and registering it in a cache memory when access is executed for more than the previously decided number o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YOKOGAWA TSUYOSHI, KUWABARA HIROMI, TOYODA MASAKI, SAITO FUMITOSHI, TAKENAKA IZUMI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator YOKOGAWA TSUYOSHI
KUWABARA HIROMI
TOYODA MASAKI
SAITO FUMITOSHI
TAKENAKA IZUMI
description PURPOSE:To eliminate structural overhead and to transfer data to a host computer at high speed by counting the number of times for accessing data which is slightly larger than a reference value and registering it in a cache memory when access is executed for more than the previously decided number of times. CONSTITUTION:A read command for reading data on a disk 2 is transmitted from the host computer 7, a microcomputer 6 executes a command processing for deciding the transfer start sector and the length of data to be read. The number of the decided sectors is compared with the reference value for judging whether data that is read from the disk 2 is unconditionally stored in the cache memory 5 or not, size with eight sectors, for example. When it is less than eight sectors, data is possibly stored in the cache memory 5. Thus, a cache memory collation processing is executed. When data does not exist in the cache memory 5, data is read from the disk 2 and it is fetched into the cache memory 5.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH06195265A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH06195265A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH06195265A3</originalsourceid><addsrcrecordid>eNrjZJD0D3ANcgzx9PdT8HdTcHZ09nBV8HX19Q-K5GFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHgZmhpamRmamjsbEqAEADEQgGQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>OPERATION OF CACHE MEMORY</title><source>esp@cenet</source><creator>YOKOGAWA TSUYOSHI ; KUWABARA HIROMI ; TOYODA MASAKI ; SAITO FUMITOSHI ; TAKENAKA IZUMI</creator><creatorcontrib>YOKOGAWA TSUYOSHI ; KUWABARA HIROMI ; TOYODA MASAKI ; SAITO FUMITOSHI ; TAKENAKA IZUMI</creatorcontrib><description>PURPOSE:To eliminate structural overhead and to transfer data to a host computer at high speed by counting the number of times for accessing data which is slightly larger than a reference value and registering it in a cache memory when access is executed for more than the previously decided number of times. CONSTITUTION:A read command for reading data on a disk 2 is transmitted from the host computer 7, a microcomputer 6 executes a command processing for deciding the transfer start sector and the length of data to be read. The number of the decided sectors is compared with the reference value for judging whether data that is read from the disk 2 is unconditionally stored in the cache memory 5 or not, size with eight sectors, for example. When it is less than eight sectors, data is possibly stored in the cache memory 5. Thus, a cache memory collation processing is executed. When data does not exist in the cache memory 5, data is read from the disk 2 and it is fetched into the cache memory 5.</description><edition>5</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19940715&amp;DB=EPODOC&amp;CC=JP&amp;NR=H06195265A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19940715&amp;DB=EPODOC&amp;CC=JP&amp;NR=H06195265A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YOKOGAWA TSUYOSHI</creatorcontrib><creatorcontrib>KUWABARA HIROMI</creatorcontrib><creatorcontrib>TOYODA MASAKI</creatorcontrib><creatorcontrib>SAITO FUMITOSHI</creatorcontrib><creatorcontrib>TAKENAKA IZUMI</creatorcontrib><title>OPERATION OF CACHE MEMORY</title><description>PURPOSE:To eliminate structural overhead and to transfer data to a host computer at high speed by counting the number of times for accessing data which is slightly larger than a reference value and registering it in a cache memory when access is executed for more than the previously decided number of times. CONSTITUTION:A read command for reading data on a disk 2 is transmitted from the host computer 7, a microcomputer 6 executes a command processing for deciding the transfer start sector and the length of data to be read. The number of the decided sectors is compared with the reference value for judging whether data that is read from the disk 2 is unconditionally stored in the cache memory 5 or not, size with eight sectors, for example. When it is less than eight sectors, data is possibly stored in the cache memory 5. Thus, a cache memory collation processing is executed. When data does not exist in the cache memory 5, data is read from the disk 2 and it is fetched into the cache memory 5.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJD0D3ANcgzx9PdT8HdTcHZ09nBV8HX19Q-K5GFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHgZmhpamRmamjsbEqAEADEQgGQ</recordid><startdate>19940715</startdate><enddate>19940715</enddate><creator>YOKOGAWA TSUYOSHI</creator><creator>KUWABARA HIROMI</creator><creator>TOYODA MASAKI</creator><creator>SAITO FUMITOSHI</creator><creator>TAKENAKA IZUMI</creator><scope>EVB</scope></search><sort><creationdate>19940715</creationdate><title>OPERATION OF CACHE MEMORY</title><author>YOKOGAWA TSUYOSHI ; KUWABARA HIROMI ; TOYODA MASAKI ; SAITO FUMITOSHI ; TAKENAKA IZUMI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH06195265A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>YOKOGAWA TSUYOSHI</creatorcontrib><creatorcontrib>KUWABARA HIROMI</creatorcontrib><creatorcontrib>TOYODA MASAKI</creatorcontrib><creatorcontrib>SAITO FUMITOSHI</creatorcontrib><creatorcontrib>TAKENAKA IZUMI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YOKOGAWA TSUYOSHI</au><au>KUWABARA HIROMI</au><au>TOYODA MASAKI</au><au>SAITO FUMITOSHI</au><au>TAKENAKA IZUMI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>OPERATION OF CACHE MEMORY</title><date>1994-07-15</date><risdate>1994</risdate><abstract>PURPOSE:To eliminate structural overhead and to transfer data to a host computer at high speed by counting the number of times for accessing data which is slightly larger than a reference value and registering it in a cache memory when access is executed for more than the previously decided number of times. CONSTITUTION:A read command for reading data on a disk 2 is transmitted from the host computer 7, a microcomputer 6 executes a command processing for deciding the transfer start sector and the length of data to be read. The number of the decided sectors is compared with the reference value for judging whether data that is read from the disk 2 is unconditionally stored in the cache memory 5 or not, size with eight sectors, for example. When it is less than eight sectors, data is possibly stored in the cache memory 5. Thus, a cache memory collation processing is executed. When data does not exist in the cache memory 5, data is read from the disk 2 and it is fetched into the cache memory 5.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPH06195265A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title OPERATION OF CACHE MEMORY
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T05%3A50%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YOKOGAWA%20TSUYOSHI&rft.date=1994-07-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH06195265A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true