METHOD FOR EXTRACTING CIRCUIT CONNECTION INFORMATION FROM INTEGRATED CIRCUIT MASK PATTERN
PURPOSE:To provide a method capable of extracting desired circuit connection information in a short processing time by performing an efficient arithmetic operation. CONSTITUTION:Integrated circuit mask patterns are digitized and fetched as digital data (S1), a specific cell is specified on the integ...
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creator | SHIMOHAKAMADA NAOKI JINBO YASUO |
description | PURPOSE:To provide a method capable of extracting desired circuit connection information in a short processing time by performing an efficient arithmetic operation. CONSTITUTION:Integrated circuit mask patterns are digitized and fetched as digital data (S1), a specific cell is specified on the integrated circuit mask pattern (S2), respective text names are imparted to the respective terminals of the specified cell for connecting to the outside of the cell so as to impart the same text name to the terminals to be at the some potential and at the same time, the position information of the respective terminals is extracted (S3). The circuit connection information is extracted with the mask pattern present in the outside of the specified cell and the respective terminals imparted with the text names as objects (S4) and the circuit connection information is corrected so as to secure mutually conducted connection relations for the plural terminals imparted with the same text name in the extracted circuit connection information (S5). |
format | Patent |
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CONSTITUTION:Integrated circuit mask patterns are digitized and fetched as digital data (S1), a specific cell is specified on the integrated circuit mask pattern (S2), respective text names are imparted to the respective terminals of the specified cell for connecting to the outside of the cell so as to impart the same text name to the terminals to be at the some potential and at the same time, the position information of the respective terminals is extracted (S3). The circuit connection information is extracted with the mask pattern present in the outside of the specified cell and the respective terminals imparted with the text names as objects (S4) and the circuit connection information is corrected so as to secure mutually conducted connection relations for the plural terminals imparted with the same text name in the extracted circuit connection information (S5).</description><edition>5</edition><language>eng</language><subject>APPARATUS SPECIALLY ADAPTED THEREFOR ; BASIC ELECTRIC ELEMENTS ; CALCULATING ; CINEMATOGRAPHY ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; ELECTROGRAPHY ; HOLOGRAPHY ; MATERIALS THEREFOR ; ORIGINALS THEREFOR ; PHOTOGRAPHY ; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940422&DB=EPODOC&CC=JP&NR=H06110972A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940422&DB=EPODOC&CC=JP&NR=H06110972A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIMOHAKAMADA NAOKI</creatorcontrib><creatorcontrib>JINBO YASUO</creatorcontrib><title>METHOD FOR EXTRACTING CIRCUIT CONNECTION INFORMATION FROM INTEGRATED CIRCUIT MASK PATTERN</title><description>PURPOSE:To provide a method capable of extracting desired circuit connection information in a short processing time by performing an efficient arithmetic operation. CONSTITUTION:Integrated circuit mask patterns are digitized and fetched as digital data (S1), a specific cell is specified on the integrated circuit mask pattern (S2), respective text names are imparted to the respective terminals of the specified cell for connecting to the outside of the cell so as to impart the same text name to the terminals to be at the some potential and at the same time, the position information of the respective terminals is extracted (S3). The circuit connection information is extracted with the mask pattern present in the outside of the specified cell and the respective terminals imparted with the text names as objects (S4) and the circuit connection information is corrected so as to secure mutually conducted connection relations for the plural terminals imparted with the same text name in the extracted circuit connection information (S5).</description><subject>APPARATUS SPECIALLY ADAPTED THEREFOR</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>CINEMATOGRAPHY</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>ELECTROGRAPHY</subject><subject>HOLOGRAPHY</subject><subject>MATERIALS THEREFOR</subject><subject>ORIGINALS THEREFOR</subject><subject>PHOTOGRAPHY</subject><subject>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZIj0dQ3x8HdRcPMPUnCNCAlydA7x9HNXcPYMcg71DFFw9vfzcwUK-fspePoB1fg6gtluQf6-QIEQV_cgxxBXF7hyX8dgb4UAx5AQ1yA_HgbWtMSc4lReKM3NoOjmGuLsoZtakB-fWlyQmJyal1oS7xXgYWBmaGhgaW7kaEyMGgBZ6DIY</recordid><startdate>19940422</startdate><enddate>19940422</enddate><creator>SHIMOHAKAMADA NAOKI</creator><creator>JINBO YASUO</creator><scope>EVB</scope></search><sort><creationdate>19940422</creationdate><title>METHOD FOR EXTRACTING CIRCUIT CONNECTION INFORMATION FROM INTEGRATED CIRCUIT MASK PATTERN</title><author>SHIMOHAKAMADA NAOKI ; JINBO YASUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH06110972A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>APPARATUS SPECIALLY ADAPTED THEREFOR</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>CINEMATOGRAPHY</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>ELECTROGRAPHY</topic><topic>HOLOGRAPHY</topic><topic>MATERIALS THEREFOR</topic><topic>ORIGINALS THEREFOR</topic><topic>PHOTOGRAPHY</topic><topic>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIMOHAKAMADA NAOKI</creatorcontrib><creatorcontrib>JINBO YASUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIMOHAKAMADA NAOKI</au><au>JINBO YASUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR EXTRACTING CIRCUIT CONNECTION INFORMATION FROM INTEGRATED CIRCUIT MASK PATTERN</title><date>1994-04-22</date><risdate>1994</risdate><abstract>PURPOSE:To provide a method capable of extracting desired circuit connection information in a short processing time by performing an efficient arithmetic operation. CONSTITUTION:Integrated circuit mask patterns are digitized and fetched as digital data (S1), a specific cell is specified on the integrated circuit mask pattern (S2), respective text names are imparted to the respective terminals of the specified cell for connecting to the outside of the cell so as to impart the same text name to the terminals to be at the some potential and at the same time, the position information of the respective terminals is extracted (S3). The circuit connection information is extracted with the mask pattern present in the outside of the specified cell and the respective terminals imparted with the text names as objects (S4) and the circuit connection information is corrected so as to secure mutually conducted connection relations for the plural terminals imparted with the same text name in the extracted circuit connection information (S5).</abstract><edition>5</edition><oa>free_for_read</oa></addata></record> |
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subjects | APPARATUS SPECIALLY ADAPTED THEREFOR BASIC ELECTRIC ELEMENTS CALCULATING CINEMATOGRAPHY COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS SEMICONDUCTOR DEVICES |
title | METHOD FOR EXTRACTING CIRCUIT CONNECTION INFORMATION FROM INTEGRATED CIRCUIT MASK PATTERN |
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