SERIAL DATA TRANSFER DEVICE

PURPOSE:To reduce the overhead of a central processing unit even at the time of complicated communication by easily realizing the chip select required for serial data transfer. CONSTITUTION:A chip select signal CS (inverted) is driven, and a counter 22 starts to count the delay signal obtained based...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: KIJI AKIO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator KIJI AKIO
description PURPOSE:To reduce the overhead of a central processing unit even at the time of complicated communication by easily realizing the chip select required for serial data transfer. CONSTITUTION:A chip select signal CS (inverted) is driven, and a counter 22 starts to count the delay signal obtained based on a clock signal 9 at the time of the start of serial data transfer, and a stop signal 10 is outputted to terminate the transfer when the counted value reaches the set value of a register 23. Since the chip select signal CS (inverted) is driven from the start of transfer to the generation of the stop signal 10 in this manner, a device to which data should be transferred can keep the write operation.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH05143493A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH05143493A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH05143493A3</originalsourceid><addsrcrecordid>eNrjZJAOdg3ydPRRcHEMcVQICXL0C3ZzDVJwcQ3zdHblYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBqaGJsYmlsaOxsSoAQBEgyCN</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SERIAL DATA TRANSFER DEVICE</title><source>esp@cenet</source><creator>KIJI AKIO</creator><creatorcontrib>KIJI AKIO</creatorcontrib><description>PURPOSE:To reduce the overhead of a central processing unit even at the time of complicated communication by easily realizing the chip select required for serial data transfer. CONSTITUTION:A chip select signal CS (inverted) is driven, and a counter 22 starts to count the delay signal obtained based on a clock signal 9 at the time of the start of serial data transfer, and a stop signal 10 is outputted to terminate the transfer when the counted value reaches the set value of a register 23. Since the chip select signal CS (inverted) is driven from the start of transfer to the generation of the stop signal 10 in this manner, a device to which data should be transferred can keep the write operation.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1993</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19930611&amp;DB=EPODOC&amp;CC=JP&amp;NR=H05143493A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19930611&amp;DB=EPODOC&amp;CC=JP&amp;NR=H05143493A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIJI AKIO</creatorcontrib><title>SERIAL DATA TRANSFER DEVICE</title><description>PURPOSE:To reduce the overhead of a central processing unit even at the time of complicated communication by easily realizing the chip select required for serial data transfer. CONSTITUTION:A chip select signal CS (inverted) is driven, and a counter 22 starts to count the delay signal obtained based on a clock signal 9 at the time of the start of serial data transfer, and a stop signal 10 is outputted to terminate the transfer when the counted value reaches the set value of a register 23. Since the chip select signal CS (inverted) is driven from the start of transfer to the generation of the stop signal 10 in this manner, a device to which data should be transferred can keep the write operation.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1993</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAOdg3ydPRRcHEMcVQICXL0C3ZzDVJwcQ3zdHblYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBqaGJsYmlsaOxsSoAQBEgyCN</recordid><startdate>19930611</startdate><enddate>19930611</enddate><creator>KIJI AKIO</creator><scope>EVB</scope></search><sort><creationdate>19930611</creationdate><title>SERIAL DATA TRANSFER DEVICE</title><author>KIJI AKIO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH05143493A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1993</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>KIJI AKIO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIJI AKIO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SERIAL DATA TRANSFER DEVICE</title><date>1993-06-11</date><risdate>1993</risdate><abstract>PURPOSE:To reduce the overhead of a central processing unit even at the time of complicated communication by easily realizing the chip select required for serial data transfer. CONSTITUTION:A chip select signal CS (inverted) is driven, and a counter 22 starts to count the delay signal obtained based on a clock signal 9 at the time of the start of serial data transfer, and a stop signal 10 is outputted to terminate the transfer when the counted value reaches the set value of a register 23. Since the chip select signal CS (inverted) is driven from the start of transfer to the generation of the stop signal 10 in this manner, a device to which data should be transferred can keep the write operation.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPH05143493A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title SERIAL DATA TRANSFER DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T08%3A13%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KIJI%20AKIO&rft.date=1993-06-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH05143493A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true