LOGIC CIRCUIT

PURPOSE:To obtain the logic circuit with fast logic output switching speed by providing a level latch means latching the level of 1st and 2nd transistors(TRs) to a prescribed level respectively. CONSTITUTION:Level latch means(PMOS, NMOS) 5, 6 latch the level of a control electrode of a 2nd TR Q3 to...

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Bibliographische Detailangaben
1. Verfasser: UEDA KIMIHIRO
Format: Patent
Sprache:eng
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