AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD
PURPOSE:To output the information of a disconnected interval as modification instruction information when the modification processing of a printed wiring board is performed by accumulating the information of the disconnected interval by performing the disconnection processing of the wiring pattern o...
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| creator | KAWAMICHI TAKETSUGU |
| description | PURPOSE:To output the information of a disconnected interval as modification instruction information when the modification processing of a printed wiring board is performed by accumulating the information of the disconnected interval by performing the disconnection processing of the wiring pattern of an interval in which the disconnection of wiring is required by the change of a net number. CONSTITUTION:It is decided that the surface packaging component ICs 33-36 are loaded on the printed wiring board 30, and it is decided on which plane, a soldering plane 31 or a component plane 32, the pads of the surface packaging component ICs 33-36 are loaded. The arrangement of all the wiring pattern information connected to the surface packaging component ICs 33-36 for the soldering plane 31 and the component plane 32 are generated, and the change of the net number is extracted by collating the wiring pattern generated last time with that generated this time, and the disconnection of the wiring is required by the change of the net number is performed, and the information of the disconnected interval is accumulated. In such a way, it is possible to output the information of the disconnected interval as the modification instruction information when the modification processing of the printed wiring board 30 is performed. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH0421074A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH0421074A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH0421074A3</originalsourceid><addsrcrecordid>eNrjZHB0DA3x93UM8XRW8PV38XTzdAay_f0UAoL8nV2Dgz393BV8XUM8_F0U3PyDgKKefiGuLgrhnkEgGSd_xyAXHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oS7xXgYWBiZGhgbuJoTIQSAKMAKtw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD</title><source>esp@cenet</source><creator>KAWAMICHI TAKETSUGU</creator><creatorcontrib>KAWAMICHI TAKETSUGU</creatorcontrib><description>PURPOSE:To output the information of a disconnected interval as modification instruction information when the modification processing of a printed wiring board is performed by accumulating the information of the disconnected interval by performing the disconnection processing of the wiring pattern of an interval in which the disconnection of wiring is required by the change of a net number. CONSTITUTION:It is decided that the surface packaging component ICs 33-36 are loaded on the printed wiring board 30, and it is decided on which plane, a soldering plane 31 or a component plane 32, the pads of the surface packaging component ICs 33-36 are loaded. The arrangement of all the wiring pattern information connected to the surface packaging component ICs 33-36 for the soldering plane 31 and the component plane 32 are generated, and the change of the net number is extracted by collating the wiring pattern generated last time with that generated this time, and the disconnection of the wiring is required by the change of the net number is performed, and the information of the disconnected interval is accumulated. In such a way, it is possible to output the information of the disconnected interval as the modification instruction information when the modification processing of the printed wiring board 30 is performed.</description><language>eng</language><subject>CALCULATING ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PHYSICS ; PRINTED CIRCUITS</subject><creationdate>1992</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19920124&DB=EPODOC&CC=JP&NR=H0421074A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19920124&DB=EPODOC&CC=JP&NR=H0421074A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KAWAMICHI TAKETSUGU</creatorcontrib><title>AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD</title><description>PURPOSE:To output the information of a disconnected interval as modification instruction information when the modification processing of a printed wiring board is performed by accumulating the information of the disconnected interval by performing the disconnection processing of the wiring pattern of an interval in which the disconnection of wiring is required by the change of a net number. CONSTITUTION:It is decided that the surface packaging component ICs 33-36 are loaded on the printed wiring board 30, and it is decided on which plane, a soldering plane 31 or a component plane 32, the pads of the surface packaging component ICs 33-36 are loaded. The arrangement of all the wiring pattern information connected to the surface packaging component ICs 33-36 for the soldering plane 31 and the component plane 32 are generated, and the change of the net number is extracted by collating the wiring pattern generated last time with that generated this time, and the disconnection of the wiring is required by the change of the net number is performed, and the information of the disconnected interval is accumulated. In such a way, it is possible to output the information of the disconnected interval as the modification instruction information when the modification processing of the printed wiring board 30 is performed.</description><subject>CALCULATING</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1992</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB0DA3x93UM8XRW8PV38XTzdAay_f0UAoL8nV2Dgz393BV8XUM8_F0U3PyDgKKefiGuLgrhnkEgGSd_xyAXHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oS7xXgYWBiZGhgbuJoTIQSAKMAKtw</recordid><startdate>19920124</startdate><enddate>19920124</enddate><creator>KAWAMICHI TAKETSUGU</creator><scope>EVB</scope></search><sort><creationdate>19920124</creationdate><title>AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD</title><author>KAWAMICHI TAKETSUGU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH0421074A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1992</creationdate><topic>CALCULATING</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>KAWAMICHI TAKETSUGU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KAWAMICHI TAKETSUGU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD</title><date>1992-01-24</date><risdate>1992</risdate><abstract>PURPOSE:To output the information of a disconnected interval as modification instruction information when the modification processing of a printed wiring board is performed by accumulating the information of the disconnected interval by performing the disconnection processing of the wiring pattern of an interval in which the disconnection of wiring is required by the change of a net number. CONSTITUTION:It is decided that the surface packaging component ICs 33-36 are loaded on the printed wiring board 30, and it is decided on which plane, a soldering plane 31 or a component plane 32, the pads of the surface packaging component ICs 33-36 are loaded. The arrangement of all the wiring pattern information connected to the surface packaging component ICs 33-36 for the soldering plane 31 and the component plane 32 are generated, and the change of the net number is extracted by collating the wiring pattern generated last time with that generated this time, and the disconnection of the wiring is required by the change of the net number is performed, and the information of the disconnected interval is accumulated. In such a way, it is possible to output the information of the disconnected interval as the modification instruction information when the modification processing of the printed wiring board 30 is performed.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PHYSICS PRINTED CIRCUITS |
| title | AUTOMATIC MODIFICATION PROCESSING METHOD FOR PRINTED WIRING BOARD |
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