ECL SIGNAL OR TTL SIGNAL COMPATIBLE WITH SEMICONDUCTOR GATE ARRAY DEVICE

ECL SIGNAL OR TTL SIGNAL COMPATIBLE WITH SEMICONDUCTOR GATE ARRAY DEVICE

PURPOSE:To enable an input-output interface to be enhanced in degree of freedom of selection by a method wherein an input stage which converts an input signal at a TTL level into a signal at an ECL level and the input stage of an ECL circuit are selectively connected to a through buffer. CONSTITUTIO...

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Hauptverfasser: TSURU YOSHIHIRO, KURAISHI TAKASHI, MATSUZAKI FUMIAKI, MORISHIGE TAKAHARU
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator TSURU YOSHIHIRO
KURAISHI TAKASHI
MATSUZAKI FUMIAKI
MORISHIGE TAKAHARU
description PURPOSE:To enable an input-output interface to be enhanced in degree of freedom of selection by a method wherein an input stage which converts an input signal at a TTL level into a signal at an ECL level and the input stage of an ECL circuit are selectively connected to a through buffer. CONSTITUTION:An interface section is provided with a TTL level first input stage 100 and a ECL level second input state 200. Therefore, when the interface section is made to serve as a TTL input interface corresponding to users' specification, an external terminal P is connected to the input of a conversion stage 100, and an output terminal T is connected to the input terminal IN of a buffer circuit 300. On the other hand, when the interface section is made to serve as an ECL input interface, the terminal P is connected to the input of the ECL input stage 200, and the output terminal E is connected to the terminal IN of the circuit 300. A complementary signal formed in the circuit 300 is fed to a level converting circuit 400 to convert a signal at an ECL level into one at a CMOS level or a BCL level.
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CONSTITUTION:An interface section is provided with a TTL level first input stage 100 and a ECL level second input state 200. Therefore, when the interface section is made to serve as a TTL input interface corresponding to users' specification, an external terminal P is connected to the input of a conversion stage 100, and an output terminal T is connected to the input terminal IN of a buffer circuit 300. On the other hand, when the interface section is made to serve as an ECL input interface, the terminal P is connected to the input of the ECL input stage 200, and the output terminal E is connected to the terminal IN of the circuit 300. A complementary signal formed in the circuit 300 is fed to a level converting circuit 400 to convert a signal at an ECL level into one at a CMOS level or a BCL level.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title ECL SIGNAL OR TTL SIGNAL COMPATIBLE WITH SEMICONDUCTOR GATE ARRAY DEVICE
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