MEMORY DEVICE

PURPOSE:To unnecessitate the specific read/write operation for the diagnosis of an ECC circuit and to diagnose the ECC circuit performing a memory operation by reading out data at every constant time, and performing the diagnosis of the ECC circuit by utilizing a refresh operation to write the data...

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1. Verfasser: YAMANE MICHIHIRO
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description PURPOSE:To unnecessitate the specific read/write operation for the diagnosis of an ECC circuit and to diagnose the ECC circuit performing a memory operation by reading out data at every constant time, and performing the diagnosis of the ECC circuit by utilizing a refresh operation to write the data again. CONSTITUTION:The phase of the refresh operation required for dynamic memory (DRAM) is shifted at every first and second memory 101, 102, and the ECC circuits 103-106 provided at the first and second memory 101, 102 are operated simultaneously when the refresh operation is performed. The data read out from the memory on one side is transferred to the ECC circuit on the other side simultaneously in readout when the refresh operation is performed, and the output of the ECC circuits 103-106 of both memory 101, 102 are compared with each other, and the inspection of the ECC circuits themselves are performed. In such a way, it is possible to inspect the ECC circuits 103-106 while a memory device 100 is operated, and also, to dispense with the specific read/write operation for the inspection of the ECC circuit.
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CONSTITUTION:The phase of the refresh operation required for dynamic memory (DRAM) is shifted at every first and second memory 101, 102, and the ECC circuits 103-106 provided at the first and second memory 101, 102 are operated simultaneously when the refresh operation is performed. The data read out from the memory on one side is transferred to the ECC circuit on the other side simultaneously in readout when the refresh operation is performed, and the output of the ECC circuits 103-106 of both memory 101, 102 are compared with each other, and the inspection of the ECC circuits themselves are performed. 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CONSTITUTION:The phase of the refresh operation required for dynamic memory (DRAM) is shifted at every first and second memory 101, 102, and the ECC circuits 103-106 provided at the first and second memory 101, 102 are operated simultaneously when the refresh operation is performed. The data read out from the memory on one side is transferred to the ECC circuit on the other side simultaneously in readout when the refresh operation is performed, and the output of the ECC circuits 103-106 of both memory 101, 102 are compared with each other, and the inspection of the ECC circuits themselves are performed. In such a way, it is possible to inspect the ECC circuits 103-106 while a memory device 100 is operated, and also, to dispense with the specific read/write operation for the inspection of the ECC circuit.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title MEMORY DEVICE
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