SEMICONDUCTOR DEVICE

PURPOSE:To make the erroneous operation due to external noise to be hardly operated while cutting down the power consumption required for the maintenance of the normal state by a method wherein, during the normal operation time, the relative potentials similar to those of conventional semiconductor...

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description PURPOSE:To make the erroneous operation due to external noise to be hardly operated while cutting down the power consumption required for the maintenance of the normal state by a method wherein, during the normal operation time, the relative potentials similar to those of conventional semiconductor device are maintained while during the emergency operation time, the threshold value voltages of respective transistors are raised higher than those in the normal operation time by setting up the potentials of respective power supply lines. CONSTITUTION:During the normal operation time, the substrate potential of a P-channel MOS transistor 5 and the potential of a high potential power supply VDD are equalized while the substrate potential of an N-channel MOS transistor and the potential of low potential power supply are equalized. On the other hand, during the emergency operation time, the substrate potential of the P- channel MOS transistor 5, the potential of high potential power supply VDD, the potential of low potential power supply, the substrate potential of the N- channel MOS transistor 6 are made to be set up in this order. Through these procedures, the threshold values can be enhanced thereby enabling the power consumption to be cut down.
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CONSTITUTION:During the normal operation time, the substrate potential of a P-channel MOS transistor 5 and the potential of a high potential power supply VDD are equalized while the substrate potential of an N-channel MOS transistor and the potential of low potential power supply are equalized. On the other hand, during the emergency operation time, the substrate potential of the P- channel MOS transistor 5, the potential of high potential power supply VDD, the potential of low potential power supply, the substrate potential of the N- channel MOS transistor 6 are made to be set up in this order. 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CONSTITUTION:During the normal operation time, the substrate potential of a P-channel MOS transistor 5 and the potential of a high potential power supply VDD are equalized while the substrate potential of an N-channel MOS transistor and the potential of low potential power supply are equalized. On the other hand, during the emergency operation time, the substrate potential of the P- channel MOS transistor 5, the potential of high potential power supply VDD, the potential of low potential power supply, the substrate potential of the N- channel MOS transistor 6 are made to be set up in this order. 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CONSTITUTION:During the normal operation time, the substrate potential of a P-channel MOS transistor 5 and the potential of a high potential power supply VDD are equalized while the substrate potential of an N-channel MOS transistor and the potential of low potential power supply are equalized. On the other hand, during the emergency operation time, the substrate potential of the P- channel MOS transistor 5, the potential of high potential power supply VDD, the potential of low potential power supply, the substrate potential of the N- channel MOS transistor 6 are made to be set up in this order. Through these procedures, the threshold values can be enhanced thereby enabling the power consumption to be cut down.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
title SEMICONDUCTOR DEVICE
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