SEMICONDUCTOR INTEGRATED CIRCUIT
PURPOSE:To prevent the increase in current consumption and the fluctuation of a power level by providing 1st and 2nd delay circuits to each input stage of 1st and 2nd transistors(TRs) to prevent a DC current in the change of the output stage from being caused. CONSTITUTION:To an input stage of 1st a...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE:To prevent the increase in current consumption and the fluctuation of a power level by providing 1st and 2nd delay circuits to each input stage of 1st and 2nd transistors(TRs) to prevent a DC current in the change of the output stage from being caused. CONSTITUTION:To an input stage of 1st and 2nd TRs 3, 4, 1st and 2nd delay circuits 5, 6 are provided respectively. The 1st and 2nd delay circuits 5, 6 retard a signal from an input terminal IN respectively and the timing in the operating state of the 1st and 2nd TRs 3, 4 is changed due to the difference from the delays to prevent the conduction state of the 1st and 2nd TRs 3, 4 between 1st and 2nd power supplies 1, 2. Thus, the increase in the current consumption is prevented and the fluctuation of the power supply level is avoided. |
---|