MULTIPLEX TRANSMITTER-RECEIVER IN HIGH LEVEL DATA LINK CONTROL PROCEDURE

PURPOSE:To attain high speed transmission by executing the processing in the unit of one bit in the processing timing synchronously with the 1-bit unit for each channel. CONSTITUTION:Upon the receipt of an 8-bit serial data from a reception signal line RXD, a demultiplexer DEMUX branches the data to channels CHO, CHI and the data is sent to reception circuits RSP0, RSP1 respectively. The reception circuits RSP0, RSP1 convert the incoming data into an 8-bit parallel (1 word) data while applying flag detection and abort error check in the unit of one bit and send the result to a reception processing circuit RPR. The processing circuit RPR according to a timing circuit TIM reads out status information from a save memory RLM in the processing for each channel (processing in the unit of words) to make the preceding processing consecutive.