DATA TRANSFER CONTROL PROCESSING SYSTEM

DATA TRANSFER CONTROL PROCESSING SYSTEM

PURPOSE:To reduce the number of data transfer control lines between a DMA controller and an I/O controller and to use a data transfer-only bus by plural I/O controllers time-dividedly by using a response signal for the timing control of start/stop of data sending. CONSTITUTION:At the time of receivi...

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1. Verfasser: YOSHIYA YUKIHIRO
Format: Patent
Sprache:eng
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CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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description PURPOSE:To reduce the number of data transfer control lines between a DMA controller and an I/O controller and to use a data transfer-only bus by plural I/O controllers time-dividedly by using a response signal for the timing control of start/stop of data sending. CONSTITUTION:At the time of receiving a response signal ACK during the transfer of read data, one of I/O controllers 91, 92 starts the sending of data to the data transfer-only bus 12, and when the data are set up, the other I/O controller 91 or 92 stops the sending of a data transfer request signal DRQ. The sending of the signal DRQ is stopped when one of the I/O controllers 91, 92 ends the entry of data after starting the sending the signal ACK and the sending of data to a data transfer-only bus 12 from a DMA controller 6 during the transfer of write data. The system is constituted so that the sending of the signal ACK and the data is stopped after the passage of a prescribed time from the stop of the sending of the signal DRQ. Thus, the time-division use of the data transfer-only bus is attained by the small number of data transfer control lines.
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CONSTITUTION:At the time of receiving a response signal ACK during the transfer of read data, one of I/O controllers 91, 92 starts the sending of data to the data transfer-only bus 12, and when the data are set up, the other I/O controller 91 or 92 stops the sending of a data transfer request signal DRQ. The sending of the signal DRQ is stopped when one of the I/O controllers 91, 92 ends the entry of data after starting the sending the signal ACK and the sending of data to a data transfer-only bus 12 from a DMA controller 6 during the transfer of write data. The system is constituted so that the sending of the signal ACK and the data is stopped after the passage of a prescribed time from the stop of the sending of the signal DRQ. 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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title DATA TRANSFER CONTROL PROCESSING SYSTEM
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