RUN-AWAY DETECTOR FOR COMPUTER SYSTEM
PURPOSE:To detect the run-away when a CPU, etc., run away and to immediately introduce a system to a fail safe by directly monitoring an input signal of the CPU, etc., with a run-away detecting circuit provided at the external part of a run-away detecting object such as the CPU. CONSTITUTION:A micro...
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creator | HAMADA AKIHIDE |
description | PURPOSE:To detect the run-away when a CPU, etc., run away and to immediately introduce a system to a fail safe by directly monitoring an input signal of the CPU, etc., with a run-away detecting circuit provided at the external part of a run-away detecting object such as the CPU. CONSTITUTION:A microcomputer system has a CPU 1 of a microprocessor mode, a memory part 2 having a ROM to store fixed data, a RAM for storing data and the like, a peripheral control part 3, an address bus 4, a data bus 5 and a control bus 6 to communicate a reading signal and a writing signal and further, provides a CPU run-away detecting circuit 7 and links this to buses 4-6. This CPU run-away detecting circuit 7 monitors the set-up time and the holding time of respective input signals necessary to the normal action of the CPU 1, etc., and when the time cannot be maintained for a prescribed time, an abnormal signal is generated. Thus, the malfunction can be detected and the system can be immediately introduced to the fail safe. |
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CONSTITUTION:A microcomputer system has a CPU 1 of a microprocessor mode, a memory part 2 having a ROM to store fixed data, a RAM for storing data and the like, a peripheral control part 3, an address bus 4, a data bus 5 and a control bus 6 to communicate a reading signal and a writing signal and further, provides a CPU run-away detecting circuit 7 and links this to buses 4-6. This CPU run-away detecting circuit 7 monitors the set-up time and the holding time of respective input signals necessary to the normal action of the CPU 1, etc., and when the time cannot be maintained for a prescribed time, an abnormal signal is generated. Thus, the malfunction can be detected and the system can be immediately introduced to the fail safe.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1989</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19891226&DB=EPODOC&CC=JP&NR=H01319833A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19891226&DB=EPODOC&CC=JP&NR=H01319833A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HAMADA AKIHIDE</creatorcontrib><title>RUN-AWAY DETECTOR FOR COMPUTER SYSTEM</title><description>PURPOSE:To detect the run-away when a CPU, etc., run away and to immediately introduce a system to a fail safe by directly monitoring an input signal of the CPU, etc., with a run-away detecting circuit provided at the external part of a run-away detecting object such as the CPU. CONSTITUTION:A microcomputer system has a CPU 1 of a microprocessor mode, a memory part 2 having a ROM to store fixed data, a RAM for storing data and the like, a peripheral control part 3, an address bus 4, a data bus 5 and a control bus 6 to communicate a reading signal and a writing signal and further, provides a CPU run-away detecting circuit 7 and links this to buses 4-6. This CPU run-away detecting circuit 7 monitors the set-up time and the holding time of respective input signals necessary to the normal action of the CPU 1, etc., and when the time cannot be maintained for a prescribed time, an abnormal signal is generated. Thus, the malfunction can be detected and the system can be immediately introduced to the fail safe.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1989</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFANCvXTdQx3jFRwcQ1xdQ7xD1JwA2Jnf9-A0BDXIIXgyOAQV18eBta0xJziVF4ozc2g6OYa4uyhm1qQH59aXJCYnJqXWhLvFeBhYGhsaGlhbOxoTIwaALhkI68</recordid><startdate>19891226</startdate><enddate>19891226</enddate><creator>HAMADA AKIHIDE</creator><scope>EVB</scope></search><sort><creationdate>19891226</creationdate><title>RUN-AWAY DETECTOR FOR COMPUTER SYSTEM</title><author>HAMADA AKIHIDE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH01319833A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1989</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>HAMADA AKIHIDE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HAMADA AKIHIDE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>RUN-AWAY DETECTOR FOR COMPUTER SYSTEM</title><date>1989-12-26</date><risdate>1989</risdate><abstract>PURPOSE:To detect the run-away when a CPU, etc., run away and to immediately introduce a system to a fail safe by directly monitoring an input signal of the CPU, etc., with a run-away detecting circuit provided at the external part of a run-away detecting object such as the CPU. CONSTITUTION:A microcomputer system has a CPU 1 of a microprocessor mode, a memory part 2 having a ROM to store fixed data, a RAM for storing data and the like, a peripheral control part 3, an address bus 4, a data bus 5 and a control bus 6 to communicate a reading signal and a writing signal and further, provides a CPU run-away detecting circuit 7 and links this to buses 4-6. This CPU run-away detecting circuit 7 monitors the set-up time and the holding time of respective input signals necessary to the normal action of the CPU 1, etc., and when the time cannot be maintained for a prescribed time, an abnormal signal is generated. Thus, the malfunction can be detected and the system can be immediately introduced to the fail safe.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
recordid | cdi_epo_espacenet_JPH01319833A |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | RUN-AWAY DETECTOR FOR COMPUTER SYSTEM |
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