SEMICONDUCTOR DEVICE
To reduce a required tolerant voltage for an element and to suppress leakage current at negative voltage input.SOLUTION: A semiconductor device (10) includes: first and second input terminals (TM1, TM2) configured to be connected to both ends of a sense resistor (RSNS); a square wave generation circ...
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| creator | OTA AKIHIRO |
| description | To reduce a required tolerant voltage for an element and to suppress leakage current at negative voltage input.SOLUTION: A semiconductor device (10) includes: first and second input terminals (TM1, TM2) configured to be connected to both ends of a sense resistor (RSNS); a square wave generation circuit (11) configured to generate a square wave signal having an amplitude proportional to a voltage between both terminals of the sense resistor upon receiving voltage applied to the first and the second input terminals; and a current detection signal output circuit (13) configured to output a current detection signal (SOUT) according to current flowing through the sense resistor based on the square wave signal. A plurality of switching transistors (SW1 to SW4) is provided in the square wave generation circuit, and the square wave signal is generated through state control of each switching transistor. A pair of diodes connected in series having mutually opposite forward directions is formed between the back gate of each switching transistor and the ground.SELECTED DRAWING: Figure 2
【課題】素子の必要耐圧の低下と、負電圧入力時のリーク電流の抑制を図る。【解決手段】半導体装置（１０）は、センス抵抗（ＲＳＮＳ）の両端に接続されるよう構成された第１及び第２入力端子（ＴＭ１、ＴＭ２）と、第１及び第２入力端子に加わる電圧を受け、センス抵抗の両端間電圧に比例する振幅を有する方形波信号を生成するよう構成された方形波生成回路（１１）と、方形波信号に基づきセンス抵抗に流れる電流に応じた電流検出信号（ＳＯＵＴ）を出力するよう構成された電流検出信号出力回路（１３）と、を備える。方形波生成回路に複数のスイッチングトランジスタ（ＳＷ１～ＳＷ４）が設けられ、各スイッチングトランジスタの状態制御を通じて方形波信号が生成される。各スイッチングトランジスタのバックゲートとグランドとの間に、直列に、互いに逆の順方向を有するダイオードの組を形成する。【選択図】図２ |
| format | Patent |
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【課題】素子の必要耐圧の低下と、負電圧入力時のリーク電流の抑制を図る。【解決手段】半導体装置（１０）は、センス抵抗（ＲＳＮＳ）の両端に接続されるよう構成された第１及び第２入力端子（ＴＭ１、ＴＭ２）と、第１及び第２入力端子に加わる電圧を受け、センス抵抗の両端間電圧に比例する振幅を有する方形波信号を生成するよう構成された方形波生成回路（１１）と、方形波信号に基づきセンス抵抗に流れる電流に応じた電流検出信号（ＳＯＵＴ）を出力するよう構成された電流検出信号出力回路（１３）と、を備える。方形波生成回路に複数のスイッチングトランジスタ（ＳＷ１～ＳＷ４）が設けられ、各スイッチングトランジスタの状態制御を通じて方形波信号が生成される。各スイッチングトランジスタのバックゲートとグランドとの間に、直列に、互いに逆の順方向を有するダイオードの組を形成する。【選択図】図２</description><language>eng ; jpn</language><subject>AMPLIFIERS ; BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240517&DB=EPODOC&CC=JP&NR=2024067609A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240517&DB=EPODOC&CC=JP&NR=2024067609A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OTA AKIHIRO</creatorcontrib><title>SEMICONDUCTOR DEVICE</title><description>To reduce a required tolerant voltage for an element and to suppress leakage current at negative voltage input.SOLUTION: A semiconductor device (10) includes: first and second input terminals (TM1, TM2) configured to be connected to both ends of a sense resistor (RSNS); a square wave generation circuit (11) configured to generate a square wave signal having an amplitude proportional to a voltage between both terminals of the sense resistor upon receiving voltage applied to the first and the second input terminals; and a current detection signal output circuit (13) configured to output a current detection signal (SOUT) according to current flowing through the sense resistor based on the square wave signal. A plurality of switching transistors (SW1 to SW4) is provided in the square wave generation circuit, and the square wave signal is generated through state control of each switching transistor. A pair of diodes connected in series having mutually opposite forward directions is formed between the back gate of each switching transistor and the ground.SELECTED DRAWING: Figure 2
【課題】素子の必要耐圧の低下と、負電圧入力時のリーク電流の抑制を図る。【解決手段】半導体装置（１０）は、センス抵抗（ＲＳＮＳ）の両端に接続されるよう構成された第１及び第２入力端子（ＴＭ１、ＴＭ２）と、第１及び第２入力端子に加わる電圧を受け、センス抵抗の両端間電圧に比例する振幅を有する方形波信号を生成するよう構成された方形波生成回路（１１）と、方形波信号に基づきセンス抵抗に流れる電流に応じた電流検出信号（ＳＯＵＴ）を出力するよう構成された電流検出信号出力回路（１３）と、を備える。方形波生成回路に複数のスイッチングトランジスタ（ＳＷ１～ＳＷ４）が設けられ、各スイッチングトランジスタの状態制御を通じて方形波信号が生成される。各スイッチングトランジスタのバックゲートとグランドとの間に、直列に、互いに逆の順方向を有するダイオードの組を形成する。【選択図】図２</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGRiYGZuZmBpaOxkQpAgC-LB8m</recordid><startdate>20240517</startdate><enddate>20240517</enddate><creator>OTA AKIHIRO</creator><scope>EVB</scope></search><sort><creationdate>20240517</creationdate><title>SEMICONDUCTOR DEVICE</title><author>OTA AKIHIRO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2024067609A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2024</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>OTA AKIHIRO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OTA AKIHIRO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE</title><date>2024-05-17</date><risdate>2024</risdate><abstract>To reduce a required tolerant voltage for an element and to suppress leakage current at negative voltage input.SOLUTION: A semiconductor device (10) includes: first and second input terminals (TM1, TM2) configured to be connected to both ends of a sense resistor (RSNS); a square wave generation circuit (11) configured to generate a square wave signal having an amplitude proportional to a voltage between both terminals of the sense resistor upon receiving voltage applied to the first and the second input terminals; and a current detection signal output circuit (13) configured to output a current detection signal (SOUT) according to current flowing through the sense resistor based on the square wave signal. A plurality of switching transistors (SW1 to SW4) is provided in the square wave generation circuit, and the square wave signal is generated through state control of each switching transistor. A pair of diodes connected in series having mutually opposite forward directions is formed between the back gate of each switching transistor and the ground.SELECTED DRAWING: Figure 2
【課題】素子の必要耐圧の低下と、負電圧入力時のリーク電流の抑制を図る。【解決手段】半導体装置（１０）は、センス抵抗（ＲＳＮＳ）の両端に接続されるよう構成された第１及び第２入力端子（ＴＭ１、ＴＭ２）と、第１及び第２入力端子に加わる電圧を受け、センス抵抗の両端間電圧に比例する振幅を有する方形波信号を生成するよう構成された方形波生成回路（１１）と、方形波信号に基づきセンス抵抗に流れる電流に応じた電流検出信号（ＳＯＵＴ）を出力するよう構成された電流検出信号出力回路（１３）と、を備える。方形波生成回路に複数のスイッチングトランジスタ（ＳＷ１～ＳＷ４）が設けられ、各スイッチングトランジスタの状態制御を通じて方形波信号が生成される。各スイッチングトランジスタのバックゲートとグランドとの間に、直列に、互いに逆の順方向を有するダイオードの組を形成する。【選択図】図２</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | AMPLIFIERS BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING |
| title | SEMICONDUCTOR DEVICE |
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