METHOD FOR MANUFACTURING DISPLAY DEVICE
To provide a method for manufacturing a display device, capable of successfully controlling the peeling of a lift-off layer that is used as a mask.SOLUTION: A method for manufacturing a display device includes the steps of: forming a lift-off layer on an array substrate having a display area where a...
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| creator | YANAGISAWA AKIRA TABATA HIROSHI SUZUKI TAKAYUKI IWAHASHI NAOYA TAKAHASHI HIDEYUKI JEAN PAUL DESORMEAUX |
| description | To provide a method for manufacturing a display device, capable of successfully controlling the peeling of a lift-off layer that is used as a mask.SOLUTION: A method for manufacturing a display device includes the steps of: forming a lift-off layer on an array substrate having a display area where a plurality of pixel electrodes are arranged and a peripheral area surrounding the display area; forming, in the display area, a plurality of first openings at positions overlapping with the plurality of pixel electrodes of the lift-off layer, and forming, in the peripheral area, a plurality of second openings in the lift-off layer; forming an organic EL layer on the lift-off layer and on the pixel electrodes overlapping with the plurality of first openings; and peeling, from the array substrate, the lift-off layer and the organic EL layer on the lift-off layer. In the step of forming the plurality of first openings and the plurality of second openings, the lift-off layer is at least partially connected and continuously formed from an outer edge side of the array substrate to the display area.SELECTED DRAWING: Figure 6
【課題】マスクとして用いられるリフトオフ層の剥離を良好に制御することが可能な表示装置の製造方法を提供する。【解決手段】表示装置の製造方法は、複数の画素電極が配列された表示領域と、表示領域を囲む周辺領域とを有するアレイ基板の上に、リフトオフ層を形成する工程と、表示領域において、リフトオフ層の複数の画素電極と重畳する位置に複数の第１開口を形成し、周辺領域において、リフトオフ層に複数の第２開口を形成する工程と、リフトオフ層の上、及び、複数の第１開口と重畳する画素電極の上に有機ＥＬ層を形成する工程と、リフトオフ層、及び、リフトオフ層の上の有機ＥＬ層をアレイ基板から剥離する工程と、を有し、複数の第１開口及び複数の第２開口を形成する工程において、リフトオフ層は、アレイ基板の外縁側から表示領域まで、少なくとも一部が繋がって連続して形成される。【選択図】図６ |
| format | Patent |
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【課題】マスクとして用いられるリフトオフ層の剥離を良好に制御することが可能な表示装置の製造方法を提供する。【解決手段】表示装置の製造方法は、複数の画素電極が配列された表示領域と、表示領域を囲む周辺領域とを有するアレイ基板の上に、リフトオフ層を形成する工程と、表示領域において、リフトオフ層の複数の画素電極と重畳する位置に複数の第１開口を形成し、周辺領域において、リフトオフ層に複数の第２開口を形成する工程と、リフトオフ層の上、及び、複数の第１開口と重畳する画素電極の上に有機ＥＬ層を形成する工程と、リフトオフ層、及び、リフトオフ層の上の有機ＥＬ層をアレイ基板から剥離する工程と、を有し、複数の第１開口及び複数の第２開口を形成する工程において、リフトオフ層は、アレイ基板の外縁側から表示領域まで、少なくとも一部が繋がって連続して形成される。【選択図】図６</description><language>eng ; jpn</language><subject>ADVERTISING ; BASIC ELECTRIC ELEMENTS ; CRYPTOGRAPHY ; DISPLAY ; DISPLAYING ; EDUCATION ; ELECTRIC HEATING ; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LABELS OR NAME-PLATES ; PHYSICS ; SEALS ; SEMICONDUCTOR DEVICES ; SIGNS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221201&DB=EPODOC&CC=JP&NR=2022177722A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221201&DB=EPODOC&CC=JP&NR=2022177722A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YANAGISAWA AKIRA</creatorcontrib><creatorcontrib>TABATA HIROSHI</creatorcontrib><creatorcontrib>SUZUKI TAKAYUKI</creatorcontrib><creatorcontrib>IWAHASHI NAOYA</creatorcontrib><creatorcontrib>TAKAHASHI HIDEYUKI</creatorcontrib><creatorcontrib>JEAN PAUL DESORMEAUX</creatorcontrib><title>METHOD FOR MANUFACTURING DISPLAY DEVICE</title><description>To provide a method for manufacturing a display device, capable of successfully controlling the peeling of a lift-off layer that is used as a mask.SOLUTION: A method for manufacturing a display device includes the steps of: forming a lift-off layer on an array substrate having a display area where a plurality of pixel electrodes are arranged and a peripheral area surrounding the display area; forming, in the display area, a plurality of first openings at positions overlapping with the plurality of pixel electrodes of the lift-off layer, and forming, in the peripheral area, a plurality of second openings in the lift-off layer; forming an organic EL layer on the lift-off layer and on the pixel electrodes overlapping with the plurality of first openings; and peeling, from the array substrate, the lift-off layer and the organic EL layer on the lift-off layer. In the step of forming the plurality of first openings and the plurality of second openings, the lift-off layer is at least partially connected and continuously formed from an outer edge side of the array substrate to the display area.SELECTED DRAWING: Figure 6
【課題】マスクとして用いられるリフトオフ層の剥離を良好に制御することが可能な表示装置の製造方法を提供する。【解決手段】表示装置の製造方法は、複数の画素電極が配列された表示領域と、表示領域を囲む周辺領域とを有するアレイ基板の上に、リフトオフ層を形成する工程と、表示領域において、リフトオフ層の複数の画素電極と重畳する位置に複数の第１開口を形成し、周辺領域において、リフトオフ層に複数の第２開口を形成する工程と、リフトオフ層の上、及び、複数の第１開口と重畳する画素電極の上に有機ＥＬ層を形成する工程と、リフトオフ層、及び、リフトオフ層の上の有機ＥＬ層をアレイ基板から剥離する工程と、を有し、複数の第１開口及び複数の第２開口を形成する工程において、リフトオフ層は、アレイ基板の外縁側から表示領域まで、少なくとも一部が繋がって連続して形成される。【選択図】図６</description><subject>ADVERTISING</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>DISPLAYING</subject><subject>EDUCATION</subject><subject>ELECTRIC HEATING</subject><subject>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LABELS OR NAME-PLATES</subject><subject>PHYSICS</subject><subject>SEALS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SIGNS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD3dQ3x8HdRcPMPUvB19At1c3QOCQ3y9HNXcPEMDvBxjFRwcQ3zdHblYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBkZGhubm5kZGjsZEKQIALMokRA</recordid><startdate>20221201</startdate><enddate>20221201</enddate><creator>YANAGISAWA AKIRA</creator><creator>TABATA HIROSHI</creator><creator>SUZUKI TAKAYUKI</creator><creator>IWAHASHI NAOYA</creator><creator>TAKAHASHI HIDEYUKI</creator><creator>JEAN PAUL DESORMEAUX</creator><scope>EVB</scope></search><sort><creationdate>20221201</creationdate><title>METHOD FOR MANUFACTURING DISPLAY DEVICE</title><author>YANAGISAWA AKIRA ; TABATA HIROSHI ; SUZUKI TAKAYUKI ; IWAHASHI NAOYA ; TAKAHASHI HIDEYUKI ; JEAN PAUL DESORMEAUX</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2022177722A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2022</creationdate><topic>ADVERTISING</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>DISPLAYING</topic><topic>EDUCATION</topic><topic>ELECTRIC HEATING</topic><topic>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LABELS OR NAME-PLATES</topic><topic>PHYSICS</topic><topic>SEALS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SIGNS</topic><toplevel>online_resources</toplevel><creatorcontrib>YANAGISAWA AKIRA</creatorcontrib><creatorcontrib>TABATA HIROSHI</creatorcontrib><creatorcontrib>SUZUKI TAKAYUKI</creatorcontrib><creatorcontrib>IWAHASHI NAOYA</creatorcontrib><creatorcontrib>TAKAHASHI HIDEYUKI</creatorcontrib><creatorcontrib>JEAN PAUL DESORMEAUX</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YANAGISAWA AKIRA</au><au>TABATA HIROSHI</au><au>SUZUKI TAKAYUKI</au><au>IWAHASHI NAOYA</au><au>TAKAHASHI HIDEYUKI</au><au>JEAN PAUL DESORMEAUX</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR MANUFACTURING DISPLAY DEVICE</title><date>2022-12-01</date><risdate>2022</risdate><abstract>To provide a method for manufacturing a display device, capable of successfully controlling the peeling of a lift-off layer that is used as a mask.SOLUTION: A method for manufacturing a display device includes the steps of: forming a lift-off layer on an array substrate having a display area where a plurality of pixel electrodes are arranged and a peripheral area surrounding the display area; forming, in the display area, a plurality of first openings at positions overlapping with the plurality of pixel electrodes of the lift-off layer, and forming, in the peripheral area, a plurality of second openings in the lift-off layer; forming an organic EL layer on the lift-off layer and on the pixel electrodes overlapping with the plurality of first openings; and peeling, from the array substrate, the lift-off layer and the organic EL layer on the lift-off layer. In the step of forming the plurality of first openings and the plurality of second openings, the lift-off layer is at least partially connected and continuously formed from an outer edge side of the array substrate to the display area.SELECTED DRAWING: Figure 6
【課題】マスクとして用いられるリフトオフ層の剥離を良好に制御することが可能な表示装置の製造方法を提供する。【解決手段】表示装置の製造方法は、複数の画素電極が配列された表示領域と、表示領域を囲む周辺領域とを有するアレイ基板の上に、リフトオフ層を形成する工程と、表示領域において、リフトオフ層の複数の画素電極と重畳する位置に複数の第１開口を形成し、周辺領域において、リフトオフ層に複数の第２開口を形成する工程と、リフトオフ層の上、及び、複数の第１開口と重畳する画素電極の上に有機ＥＬ層を形成する工程と、リフトオフ層、及び、リフトオフ層の上の有機ＥＬ層をアレイ基板から剥離する工程と、を有し、複数の第１開口及び複数の第２開口を形成する工程において、リフトオフ層は、アレイ基板の外縁側から表示領域まで、少なくとも一部が繋がって連続して形成される。【選択図】図６</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | ADVERTISING BASIC ELECTRIC ELEMENTS CRYPTOGRAPHY DISPLAY DISPLAYING EDUCATION ELECTRIC HEATING ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY LABELS OR NAME-PLATES PHYSICS SEALS SEMICONDUCTOR DEVICES SIGNS |
| title | METHOD FOR MANUFACTURING DISPLAY DEVICE |
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