ROW REDUNDANCY WITH DISTRIBUTED SECTORS
To provide a technique for a flash memory with row redundancy.SOLUTION: A semiconductor device includes an embedded flash memory. The embedded flash memory includes a memory bank 300 including a plurality of physical sectors 302. Each physical sector 302 includes a plurality of erase sectors 302_0 t...
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description | To provide a technique for a flash memory with row redundancy.SOLUTION: A semiconductor device includes an embedded flash memory. The embedded flash memory includes a memory bank 300 including a plurality of physical sectors 302. Each physical sector 302 includes a plurality of erase sectors 302_0 to 302_3. In the memory bank, a plurality of portions of the additional erase sector are respectively distributed among the plurality of physical sectors. The plurality of portions of the additional erase sector are configured as a row-redundancy sector for the memory bank.SELECTED DRAWING: Figure 3
【課題】行冗長性を有するフラッシュメモリのための技術を提供する。【解決手段】半導体デバイスは埋め込みフラッシュメモリを備える。埋め込みフラッシュメモリは、複数の物理セクタ302を含むメモリバンク300を備える。各物理セクタ302は、複数の消去セクタ302_0〜302_3を備える。メモリバンクにおいて、追加の消去セクタの複数の部分は、複数の物理セクタの間にそれぞれ分散される。追加の消去セクタの複数の部分は、メモリバンクのための行冗長性セクタとして構成される。【選択図】図3 |
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【課題】行冗長性を有するフラッシュメモリのための技術を提供する。【解決手段】半導体デバイスは埋め込みフラッシュメモリを備える。埋め込みフラッシュメモリは、複数の物理セクタ302を含むメモリバンク300を備える。各物理セクタ302は、複数の消去セクタ302_0〜302_3を備える。メモリバンクにおいて、追加の消去セクタの複数の部分は、複数の物理セクタの間にそれぞれ分散される。追加の消去セクタの複数の部分は、メモリバンクのための行冗長性セクタとして構成される。【選択図】図3</description><language>eng ; jpn</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210121&DB=EPODOC&CC=JP&NR=2021007062A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210121&DB=EPODOC&CC=JP&NR=2021007062A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>URI KOTLICKI</creatorcontrib><creatorcontrib>KOBI DANON</creatorcontrib><creatorcontrib>ARIEH FELDMAN</creatorcontrib><creatorcontrib>YORAM BETSER</creatorcontrib><title>ROW REDUNDANCY WITH DISTRIBUTED SECTORS</title><description>To provide a technique for a flash memory with row redundancy.SOLUTION: A semiconductor device includes an embedded flash memory. The embedded flash memory includes a memory bank 300 including a plurality of physical sectors 302. Each physical sector 302 includes a plurality of erase sectors 302_0 to 302_3. In the memory bank, a plurality of portions of the additional erase sector are respectively distributed among the plurality of physical sectors. The plurality of portions of the additional erase sector are configured as a row-redundancy sector for the memory bank.SELECTED DRAWING: Figure 3
【課題】行冗長性を有するフラッシュメモリのための技術を提供する。【解決手段】半導体デバイスは埋め込みフラッシュメモリを備える。埋め込みフラッシュメモリは、複数の物理セクタ302を含むメモリバンク300を備える。各物理セクタ302は、複数の消去セクタ302_0〜302_3を備える。メモリバンクにおいて、追加の消去セクタの複数の部分は、複数の物理セクタの間にそれぞれ分散される。追加の消去セクタの複数の部分は、メモリバンクのための行冗長性セクタとして構成される。【選択図】図3</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAP8g9XCHJ1CfVzcfRzjlQI9wzxUHDxDA4J8nQKDXF1UQh2dQ7xDwrmYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBkaGBgbmBmZGjsZEKQIARoIkcQ</recordid><startdate>20210121</startdate><enddate>20210121</enddate><creator>URI KOTLICKI</creator><creator>KOBI DANON</creator><creator>ARIEH FELDMAN</creator><creator>YORAM BETSER</creator><scope>EVB</scope></search><sort><creationdate>20210121</creationdate><title>ROW REDUNDANCY WITH DISTRIBUTED SECTORS</title><author>URI KOTLICKI ; KOBI DANON ; ARIEH FELDMAN ; YORAM BETSER</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2021007062A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2021</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>URI KOTLICKI</creatorcontrib><creatorcontrib>KOBI DANON</creatorcontrib><creatorcontrib>ARIEH FELDMAN</creatorcontrib><creatorcontrib>YORAM BETSER</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>URI KOTLICKI</au><au>KOBI DANON</au><au>ARIEH FELDMAN</au><au>YORAM BETSER</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ROW REDUNDANCY WITH DISTRIBUTED SECTORS</title><date>2021-01-21</date><risdate>2021</risdate><abstract>To provide a technique for a flash memory with row redundancy.SOLUTION: A semiconductor device includes an embedded flash memory. The embedded flash memory includes a memory bank 300 including a plurality of physical sectors 302. Each physical sector 302 includes a plurality of erase sectors 302_0 to 302_3. In the memory bank, a plurality of portions of the additional erase sector are respectively distributed among the plurality of physical sectors. The plurality of portions of the additional erase sector are configured as a row-redundancy sector for the memory bank.SELECTED DRAWING: Figure 3
【課題】行冗長性を有するフラッシュメモリのための技術を提供する。【解決手段】半導体デバイスは埋め込みフラッシュメモリを備える。埋め込みフラッシュメモリは、複数の物理セクタ302を含むメモリバンク300を備える。各物理セクタ302は、複数の消去セクタ302_0〜302_3を備える。メモリバンクにおいて、追加の消去セクタの複数の部分は、複数の物理セクタの間にそれぞれ分散される。追加の消去セクタの複数の部分は、メモリバンクのための行冗長性セクタとして構成される。【選択図】図3</abstract><oa>free_for_read</oa></addata></record> |
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title | ROW REDUNDANCY WITH DISTRIBUTED SECTORS |
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