WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

To provide a wiring board capable of inhibiting occurrence of warpage.SOLUTION: A wiring board 20 has: an insulation layer 30 composed of insulating resin containing grass cloth 30G; concavities 30X formed on an undersurface 30B of the insulation layer 30; a wiring layer 31 filled up in the concavit...

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description To provide a wiring board capable of inhibiting occurrence of warpage.SOLUTION: A wiring board 20 has: an insulation layer 30 composed of insulating resin containing grass cloth 30G; concavities 30X formed on an undersurface 30B of the insulation layer 30; a wiring layer 31 filled up in the concavities 30X; via wiring 32 which pierces the insulation layer 30 in a thickness direction to be connected with the wiring layer 31; and a wiring structure 23 stacked on a top face 30A of the insulation layer 30. An undersurface 31L of the wiring layer 31 is formed so as to be flush with the undersurface 30B of the insulation layer 30 or so as to dent toward the wiring structure 23 from the undersurface 30B of the insulation layer 30. The glass cloth 30G is eccentrically located in such a manner as to be closer to the wiring structure 23 than the center C1 of the insulation layer 30 in a thickness direction and provided in such a manner as to be located at the center in a thickness direction of a thickness T3 from the undersurface 30B of the insulation layer 30 to a top face of the uppermost layer of the wiring layer 45 in the wiring structure 23.SELECTED DRAWING: Figure 1 【課題】反りの発生を抑制できる配線基板を提供する。【解決手段】配線基板20は、ガラスクロス30G入りの絶縁性樹脂からなる絶縁層30と、絶縁層30の下面30Bに形成された凹部30Xと、凹部30Xに充填された配線層31と、絶縁層30を厚さ方向に貫通して配線層31と接続されたビア配線32と、絶縁層30の上面30Aに積層された配線構造23とを有する。配線層31の下面31Lは、絶縁層30の下面30Bと面一になるように、又は絶縁層30の下面30Bよりも配線構造23側に凹むように形成されている。ガラスクロス30Gは、絶縁層30の厚さ方向の中心C1よりも配線構造23側に偏在するとともに、絶縁層30の下面30Bから配線構造23の最上層の配線層45の上面までの厚さT3における厚さ方向の中心に位置するように設けられている。【選択図】図1
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An undersurface 31L of the wiring layer 31 is formed so as to be flush with the undersurface 30B of the insulation layer 30 or so as to dent toward the wiring structure 23 from the undersurface 30B of the insulation layer 30. The glass cloth 30G is eccentrically located in such a manner as to be closer to the wiring structure 23 than the center C1 of the insulation layer 30 in a thickness direction and provided in such a manner as to be located at the center in a thickness direction of a thickness T3 from the undersurface 30B of the insulation layer 30 to a top face of the uppermost layer of the wiring layer 45 in the wiring structure 23.SELECTED DRAWING: Figure 1 【課題】反りの発生を抑制できる配線基板を提供する。【解決手段】配線基板20は、ガラスクロス30G入りの絶縁性樹脂からなる絶縁層30と、絶縁層30の下面30Bに形成された凹部30Xと、凹部30Xに充填された配線層31と、絶縁層30を厚さ方向に貫通して配線層31と接続されたビア配線32と、絶縁層30の上面30Aに積層された配線構造23とを有する。配線層31の下面31Lは、絶縁層30の下面30Bと面一になるように、又は絶縁層30の下面30Bよりも配線構造23側に凹むように形成されている。ガラスクロス30Gは、絶縁層30の厚さ方向の中心C1よりも配線構造23側に偏在するとともに、絶縁層30の下面30Bから配線構造23の最上層の配線層45の上面までの厚さT3における厚さ方向の中心に位置するように設けられている。【選択図】図1</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190314&amp;DB=EPODOC&amp;CC=JP&amp;NR=2019041041A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190314&amp;DB=EPODOC&amp;CC=JP&amp;NR=2019041041A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FURUICHI JUN</creatorcontrib><title>WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><description>To provide a wiring board capable of inhibiting occurrence of warpage.SOLUTION: A wiring board 20 has: an insulation layer 30 composed of insulating resin containing grass cloth 30G; concavities 30X formed on an undersurface 30B of the insulation layer 30; a wiring layer 31 filled up in the concavities 30X; via wiring 32 which pierces the insulation layer 30 in a thickness direction to be connected with the wiring layer 31; and a wiring structure 23 stacked on a top face 30A of the insulation layer 30. An undersurface 31L of the wiring layer 31 is formed so as to be flush with the undersurface 30B of the insulation layer 30 or so as to dent toward the wiring structure 23 from the undersurface 30B of the insulation layer 30. The glass cloth 30G is eccentrically located in such a manner as to be closer to the wiring structure 23 than the center C1 of the insulation layer 30 in a thickness direction and provided in such a manner as to be located at the center in a thickness direction of a thickness T3 from the undersurface 30B of the insulation layer 30 to a top face of the uppermost layer of the wiring layer 45 in the wiring structure 23.SELECTED DRAWING: Figure 1 【課題】反りの発生を抑制できる配線基板を提供する。【解決手段】配線基板20は、ガラスクロス30G入りの絶縁性樹脂からなる絶縁層30と、絶縁層30の下面30Bに形成された凹部30Xと、凹部30Xに充填された配線層31と、絶縁層30を厚さ方向に貫通して配線層31と接続されたビア配線32と、絶縁層30の上面30Aに積層された配線構造23とを有する。配線層31の下面31Lは、絶縁層30の下面30Bと面一になるように、又は絶縁層30の下面30Bよりも配線構造23側に凹むように形成されている。ガラスクロス30Gは、絶縁層30の厚さ方向の中心C1よりも配線構造23側に偏在するとともに、絶縁層30の下面30Bから配線構造23の最上層の配線層45の上面までの厚さT3における厚さ方向の中心に位置するように設けられている。【選択図】図1</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZCgO9wzy9HNXcPJ3DHLRUQh29fV09vdzCXUO8Q9ScHEN83R21VFAVqPg6-gX6uboHBIKFvN1DfHwd1Fw9HPBqherah4G1rTEnOJUXijNzaDk5hri7KGbWpAfn1pckJicmpdaEu8VYGRgaGlgYghEjsZEKQIA8xc5HQ</recordid><startdate>20190314</startdate><enddate>20190314</enddate><creator>FURUICHI JUN</creator><scope>EVB</scope></search><sort><creationdate>20190314</creationdate><title>WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><author>FURUICHI JUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2019041041A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FURUICHI JUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FURUICHI JUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><date>2019-03-14</date><risdate>2019</risdate><abstract>To provide a wiring board capable of inhibiting occurrence of warpage.SOLUTION: A wiring board 20 has: an insulation layer 30 composed of insulating resin containing grass cloth 30G; concavities 30X formed on an undersurface 30B of the insulation layer 30; a wiring layer 31 filled up in the concavities 30X; via wiring 32 which pierces the insulation layer 30 in a thickness direction to be connected with the wiring layer 31; and a wiring structure 23 stacked on a top face 30A of the insulation layer 30. An undersurface 31L of the wiring layer 31 is formed so as to be flush with the undersurface 30B of the insulation layer 30 or so as to dent toward the wiring structure 23 from the undersurface 30B of the insulation layer 30. The glass cloth 30G is eccentrically located in such a manner as to be closer to the wiring structure 23 than the center C1 of the insulation layer 30 in a thickness direction and provided in such a manner as to be located at the center in a thickness direction of a thickness T3 from the undersurface 30B of the insulation layer 30 to a top face of the uppermost layer of the wiring layer 45 in the wiring structure 23.SELECTED DRAWING: Figure 1 【課題】反りの発生を抑制できる配線基板を提供する。【解決手段】配線基板20は、ガラスクロス30G入りの絶縁性樹脂からなる絶縁層30と、絶縁層30の下面30Bに形成された凹部30Xと、凹部30Xに充填された配線層31と、絶縁層30を厚さ方向に貫通して配線層31と接続されたビア配線32と、絶縁層30の上面30Aに積層された配線構造23とを有する。配線層31の下面31Lは、絶縁層30の下面30Bと面一になるように、又は絶縁層30の下面30Bよりも配線構造23側に凹むように形成されている。ガラスクロス30Gは、絶縁層30の厚さ方向の中心C1よりも配線構造23側に偏在するとともに、絶縁層30の下面30Bから配線構造23の最上層の配線層45の上面までの厚さT3における厚さ方向の中心に位置するように設けられている。【選択図】図1</abstract><oa>free_for_read</oa></addata></record>
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language eng ; jpn
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subjects BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
title WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
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