MEMORY CONTROL CIRCUIT, MEMORY, AND MEMORY CONTROL METHOD

To provide a memory control circuit, a memory, and a memory control method capable of reducing a writing time.SOLUTION: When the number of bits of a bit string 21 that is different from an initial value (logic value "1") of memory cells 11 a1 to 11an is 2 or less, a control circuit 12b writes to a storage section 11 by corresponding a bit string 21 and an additional value 25a with each other, in the case of 6 bits or more, the control circuit writes to the storage section 11 by corresponding an inversion bit string 21a and an additional value 25b with each other, in the case of 3-5 bits, when the number of bits of the logical value "0" is 2 bits or less in a first converted bit string 21c obtained by logical sum of the lower 4 bits of the bit string 21 and the inverted bit string 21a, the control circuit writes to the storage section 11 by corresponding the first converted bit string 21c, an additional value 25c, and a restored code 26a with each other, and in the case of 2 bits or more, the control circuit writes to the storage section 11 by corresponding a second converted bit string 21e obtained by the logical sum of the lower 4 bits of the inverted bit string 21a and the bit string 21, an additional value 25d, and a restored code 26b with each other.SELECTED DRAWING: Figure 1 【課題】書き込み時間を短縮できる。【解決手段】制御回路１２ｂは、メモリセル１１ａ１〜１１ａｎの初期値（論理値"１"）とは異なるビット列２１のビット数が、２ビット以下の場合、ビット列２１と付加値２５ａとを対応付けて記憶部１１に書き込み、６ビット以上の場合、反転ビット列２１ａと付加値２５ｂとを対応付けて記憶部１１に書き込み、３−５ビットである場合、ビット列２１の下位４ビットと反転ビット列２１ａとの論理和をとった第１変換後ビット列２１ｃにおいて論理値"０"のビット数が、２ビット以下である場合、第１変換後ビット列２１ｃと付加値２５ｃと復元コード２６ａとを対応付けて記憶部１１に書き込み、２ビットより大きい場合、反転ビット列２１ａの下位４ビットとビット列２１との論理和をとった第２変換後ビット列２１ｅと付加値２５ｄと復元コード２６ｂとを対応付けて記憶部１１に書き込む。【選択図】図１