SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To improve reliability of a semiconductor device having a FINFET.SOLUTION: A semiconductor device comprises: a first N-channel FET(NT1) and a second N-channel FET(NT2) series connected to between an interconnection M1(OUT) for output and an interconnection M1(VSS) for second po...

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Bibliographische Detailangaben
Hauptverfasser: SUZUMURA NAOHITO, AONO HIDEKI
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To improve reliability of a semiconductor device having a FINFET.SOLUTION: A semiconductor device comprises: a first N-channel FET(NT1) and a second N-channel FET(NT2) series connected to between an interconnection M1(OUT) for output and an interconnection M1(VSS) for second power supply potential of a 2-input NAND circuit; a local interconnection LIn3 which is arranged, in plan view, between a first N gate electrode G1 of the first N-channel FET(NT1) and a second N gate electrode G2 of the second N-channel FET(NT2), the first N gate electrode G1 and the second N gate electrode G2 extending in the second direction(Y), and which crosses a semiconductor layer FN2 extending in a first direction(X) to extend in the second direction(Y); and an interconnection M1(R) for radiation connected to the local interconnection LIn3.SELECTED DRAWING: Figure 7 【課題】FINFETを有する半導体装置の信頼性を向上する。【解決手段】半導体装置は、2入力NAND回路の出力用の配線M1(OUT)と第2電源電位用の配線M1(VSS)との間に直列接続された第1Nチャネル型FET(NT1)および第2Nチャネル型FET(NT2)を有する。平面視にて、第2方向(Y)に延在する第1Nチャネル型FET(NT1)の第1Nゲート電極G1および第2Nチャネル型FET(NT2)の第2Nゲート電極G2の間に配置され、第1方向(X)に延在する半導体層FN2と交差して、第2方向(Y)に延在するローカル配線LIn3には、放熱用の配線M1(R)が接続されている。【選択図】図7