PROCESSING METHOD FOR WAFER

PROBLEM TO BE SOLVED: To provide a processing method for a wafer capable of selecting working conditions, without using the wafer for product.SOLUTION: A processing method for a wafer includes a wafer preparation step of preparing a production wafer W having irregularities formed on a wafer surface,...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: BAE TEU
Format: Patent
Sprache:eng ; jpn
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator BAE TEU
description PROBLEM TO BE SOLVED: To provide a processing method for a wafer capable of selecting working conditions, without using the wafer for product.SOLUTION: A processing method for a wafer includes a wafer preparation step of preparing a production wafer W having irregularities formed on a wafer surface, and a pseudo wafer 1 composed of the same material as a production wafer W, a patterning step of forming the irregularities imitating the production wafer W on the surface 1a of the pseudo wafer 1 by a three-dimensional modeling machine, a processing condition selection step of selecting the processing condition by processing a pseudo wafer 2 after execution of the patterning step, and a main processing step of processing the production wafer W under the processing condition selected by the processing condition selection step. Consequently, the pseudo wafer 2 can be formed simply and relatively inexpensively. Since the production wafer W is not used but the pseudo wafer 2 is used in the processing condition selection step, more processing conditions than before can be evaluated, and the production wafer W can be processed by selecting appropriate processing conditions.SELECTED DRAWING: Figure 3 【課題】製品用のウエーハを使用せずに、加工条件を選定しうるウエーハの加工方法を提供する。【解決手段】ウエーハの加工方法は、ウエーハの表面に凹凸が形成された本番用ウエーハW及び本番用ウエーハWと同質の素材からなる疑似ウエーハ1を準備するウエーハ準備工程と、疑似ウエーハ1の表面1aに3次元造型機によって本番用ウエーハWを模した凹凸を形成するパターン形成工程と、パターン形成工程実施後に疑似ウエーハ2を加工して加工条件を選定する加工条件選定工程と、加工条件選定工程で選定された加工条件で本番用ウエーハWを加工する本加工工程とを備えるため、簡易で、かつ比較的安価に疑似ウエーハ2を形成できる。加工条件選定工程では、本番用ウエーハWを使用せずに、疑似ウエーハ2を使用するため、従来よりも多くの加工条件の評価を行うことができ、適切な加工条件を選定し、本番用ウエーハWを加工することができる。【選択図】図3
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2018147950A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2018147950A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2018147950A3</originalsourceid><addsrcrecordid>eNrjZJAOCPJ3dg0O9vRzV_B1DfHwd1Fw8w9SCHd0cw3iYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBoYWhibmlqYGjsZEKQIAkh8g-g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PROCESSING METHOD FOR WAFER</title><source>esp@cenet</source><creator>BAE TEU</creator><creatorcontrib>BAE TEU</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a processing method for a wafer capable of selecting working conditions, without using the wafer for product.SOLUTION: A processing method for a wafer includes a wafer preparation step of preparing a production wafer W having irregularities formed on a wafer surface, and a pseudo wafer 1 composed of the same material as a production wafer W, a patterning step of forming the irregularities imitating the production wafer W on the surface 1a of the pseudo wafer 1 by a three-dimensional modeling machine, a processing condition selection step of selecting the processing condition by processing a pseudo wafer 2 after execution of the patterning step, and a main processing step of processing the production wafer W under the processing condition selected by the processing condition selection step. Consequently, the pseudo wafer 2 can be formed simply and relatively inexpensively. Since the production wafer W is not used but the pseudo wafer 2 is used in the processing condition selection step, more processing conditions than before can be evaluated, and the production wafer W can be processed by selecting appropriate processing conditions.SELECTED DRAWING: Figure 3 【課題】製品用のウエーハを使用せずに、加工条件を選定しうるウエーハの加工方法を提供する。【解決手段】ウエーハの加工方法は、ウエーハの表面に凹凸が形成された本番用ウエーハW及び本番用ウエーハWと同質の素材からなる疑似ウエーハ1を準備するウエーハ準備工程と、疑似ウエーハ1の表面1aに3次元造型機によって本番用ウエーハWを模した凹凸を形成するパターン形成工程と、パターン形成工程実施後に疑似ウエーハ2を加工して加工条件を選定する加工条件選定工程と、加工条件選定工程で選定された加工条件で本番用ウエーハWを加工する本加工工程とを備えるため、簡易で、かつ比較的安価に疑似ウエーハ2を形成できる。加工条件選定工程では、本番用ウエーハWを使用せずに、疑似ウエーハ2を使用するため、従来よりも多くの加工条件の評価を行うことができ、適切な加工条件を選定し、本番用ウエーハWを加工することができる。【選択図】図3</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180920&amp;DB=EPODOC&amp;CC=JP&amp;NR=2018147950A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180920&amp;DB=EPODOC&amp;CC=JP&amp;NR=2018147950A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BAE TEU</creatorcontrib><title>PROCESSING METHOD FOR WAFER</title><description>PROBLEM TO BE SOLVED: To provide a processing method for a wafer capable of selecting working conditions, without using the wafer for product.SOLUTION: A processing method for a wafer includes a wafer preparation step of preparing a production wafer W having irregularities formed on a wafer surface, and a pseudo wafer 1 composed of the same material as a production wafer W, a patterning step of forming the irregularities imitating the production wafer W on the surface 1a of the pseudo wafer 1 by a three-dimensional modeling machine, a processing condition selection step of selecting the processing condition by processing a pseudo wafer 2 after execution of the patterning step, and a main processing step of processing the production wafer W under the processing condition selected by the processing condition selection step. Consequently, the pseudo wafer 2 can be formed simply and relatively inexpensively. Since the production wafer W is not used but the pseudo wafer 2 is used in the processing condition selection step, more processing conditions than before can be evaluated, and the production wafer W can be processed by selecting appropriate processing conditions.SELECTED DRAWING: Figure 3 【課題】製品用のウエーハを使用せずに、加工条件を選定しうるウエーハの加工方法を提供する。【解決手段】ウエーハの加工方法は、ウエーハの表面に凹凸が形成された本番用ウエーハW及び本番用ウエーハWと同質の素材からなる疑似ウエーハ1を準備するウエーハ準備工程と、疑似ウエーハ1の表面1aに3次元造型機によって本番用ウエーハWを模した凹凸を形成するパターン形成工程と、パターン形成工程実施後に疑似ウエーハ2を加工して加工条件を選定する加工条件選定工程と、加工条件選定工程で選定された加工条件で本番用ウエーハWを加工する本加工工程とを備えるため、簡易で、かつ比較的安価に疑似ウエーハ2を形成できる。加工条件選定工程では、本番用ウエーハWを使用せずに、疑似ウエーハ2を使用するため、従来よりも多くの加工条件の評価を行うことができ、適切な加工条件を選定し、本番用ウエーハWを加工することができる。【選択図】図3</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAOCPJ3dg0O9vRzV_B1DfHwd1Fw8w9SCHd0cw3iYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBoYWhibmlqYGjsZEKQIAkh8g-g</recordid><startdate>20180920</startdate><enddate>20180920</enddate><creator>BAE TEU</creator><scope>EVB</scope></search><sort><creationdate>20180920</creationdate><title>PROCESSING METHOD FOR WAFER</title><author>BAE TEU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2018147950A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BAE TEU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BAE TEU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PROCESSING METHOD FOR WAFER</title><date>2018-09-20</date><risdate>2018</risdate><abstract>PROBLEM TO BE SOLVED: To provide a processing method for a wafer capable of selecting working conditions, without using the wafer for product.SOLUTION: A processing method for a wafer includes a wafer preparation step of preparing a production wafer W having irregularities formed on a wafer surface, and a pseudo wafer 1 composed of the same material as a production wafer W, a patterning step of forming the irregularities imitating the production wafer W on the surface 1a of the pseudo wafer 1 by a three-dimensional modeling machine, a processing condition selection step of selecting the processing condition by processing a pseudo wafer 2 after execution of the patterning step, and a main processing step of processing the production wafer W under the processing condition selected by the processing condition selection step. Consequently, the pseudo wafer 2 can be formed simply and relatively inexpensively. Since the production wafer W is not used but the pseudo wafer 2 is used in the processing condition selection step, more processing conditions than before can be evaluated, and the production wafer W can be processed by selecting appropriate processing conditions.SELECTED DRAWING: Figure 3 【課題】製品用のウエーハを使用せずに、加工条件を選定しうるウエーハの加工方法を提供する。【解決手段】ウエーハの加工方法は、ウエーハの表面に凹凸が形成された本番用ウエーハW及び本番用ウエーハWと同質の素材からなる疑似ウエーハ1を準備するウエーハ準備工程と、疑似ウエーハ1の表面1aに3次元造型機によって本番用ウエーハWを模した凹凸を形成するパターン形成工程と、パターン形成工程実施後に疑似ウエーハ2を加工して加工条件を選定する加工条件選定工程と、加工条件選定工程で選定された加工条件で本番用ウエーハWを加工する本加工工程とを備えるため、簡易で、かつ比較的安価に疑似ウエーハ2を形成できる。加工条件選定工程では、本番用ウエーハWを使用せずに、疑似ウエーハ2を使用するため、従来よりも多くの加工条件の評価を行うことができ、適切な加工条件を選定し、本番用ウエーハWを加工することができる。【選択図】図3</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; jpn
recordid cdi_epo_espacenet_JP2018147950A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title PROCESSING METHOD FOR WAFER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T17%3A23%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BAE%20TEU&rft.date=2018-09-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2018147950A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true