COMPUTER SYSTEM

PROBLEM TO BE SOLVED: To provide a computer system capable of handling abnormal interruption with the minimum degeneration operation.SOLUTION: The computer system includes: a management table 6 configured to manage allocation of IO cards A3, B4 to a plurality of interruption lines INTA to D of a PCI...

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description PROBLEM TO BE SOLVED: To provide a computer system capable of handling abnormal interruption with the minimum degeneration operation.SOLUTION: The computer system includes: a management table 6 configured to manage allocation of IO cards A3, B4 to a plurality of interruption lines INTA to D of a PCI bus 2; switching parts A31, B41 configured to be switched to any of the interruption lines in each IO card A3, B4, and an RAS processing part 7 configured to, when receiving notification indicating that abnormality has occurred in any of the interruption lines INTA to D, instruct the switching of the interruption lines INTA to D in the switching parts A31, B41 by changing the allocation of the management table 6, and to determine the IO cards A3, B4 or the interruption lines INTA to D as a target of abnormality, and to allocate the IO cards A3, B4 or the interruption lines INTA to D as the target of abnormality to the specific interruption line relatively to the management table 6, and to mask the specific interruption line by restarting a computer system 100.SELECTED DRAWING: Figure 1 【課題】異常割り込みに対して最小限の縮退運転にて対応することができる計算機システムを提供する。【解決手段】PCIバス2の複数の割り込みラインINTA〜DへのIOカードA3、B4の割り付けを管理する管理テーブル6と、各IOカードA3、B4において割り込みラインのいずれかに切り替る切替部A31、B41と、割り込みラインINTA〜Dのいずれかに異常が発生した通知を受けると、管理テーブル6の割り付けを変更して切替部A31、B41にて割り込みラインINTA〜Dの切り替えを指示し、異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを判定し、管理テーブル6に対して異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを特定の割り込みラインに割り付け、計算機システム100の再起動し特定の割り込みラインをマスクするRAS処理部7とを有する。【選択図】図1
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switching parts A31, B41 configured to be switched to any of the interruption lines in each IO card A3, B4, and an RAS processing part 7 configured to, when receiving notification indicating that abnormality has occurred in any of the interruption lines INTA to D, instruct the switching of the interruption lines INTA to D in the switching parts A31, B41 by changing the allocation of the management table 6, and to determine the IO cards A3, B4 or the interruption lines INTA to D as a target of abnormality, and to allocate the IO cards A3, B4 or the interruption lines INTA to D as the target of abnormality to the specific interruption line relatively to the management table 6, and to mask the specific interruption line by restarting a computer system 100.SELECTED DRAWING: Figure 1 【課題】異常割り込みに対して最小限の縮退運転にて対応することができる計算機システムを提供する。【解決手段】PCIバス2の複数の割り込みラインINTA〜DへのIOカードA3、B4の割り付けを管理する管理テーブル6と、各IOカードA3、B4において割り込みラインのいずれかに切り替る切替部A31、B41と、割り込みラインINTA〜Dのいずれかに異常が発生した通知を受けると、管理テーブル6の割り付けを変更して切替部A31、B41にて割り込みラインINTA〜Dの切り替えを指示し、異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを判定し、管理テーブル6に対して異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを特定の割り込みラインに割り付け、計算機システム100の再起動し特定の割り込みラインをマスクするRAS処理部7とを有する。【選択図】図1</description><language>eng ; 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jpn</language><creationdate>2017</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>HATADA TAKASHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HATADA TAKASHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>COMPUTER SYSTEM</title><date>2017-02-23</date><risdate>2017</risdate><abstract>PROBLEM TO BE SOLVED: To provide a computer system capable of handling abnormal interruption with the minimum degeneration operation.SOLUTION: The computer system includes: a management table 6 configured to manage allocation of IO cards A3, B4 to a plurality of interruption lines INTA to D of a PCI bus 2; switching parts A31, B41 configured to be switched to any of the interruption lines in each IO card A3, B4, and an RAS processing part 7 configured to, when receiving notification indicating that abnormality has occurred in any of the interruption lines INTA to D, instruct the switching of the interruption lines INTA to D in the switching parts A31, B41 by changing the allocation of the management table 6, and to determine the IO cards A3, B4 or the interruption lines INTA to D as a target of abnormality, and to allocate the IO cards A3, B4 or the interruption lines INTA to D as the target of abnormality to the specific interruption line relatively to the management table 6, and to mask the specific interruption line by restarting a computer system 100.SELECTED DRAWING: Figure 1 【課題】異常割り込みに対して最小限の縮退運転にて対応することができる計算機システムを提供する。【解決手段】PCIバス2の複数の割り込みラインINTA〜DへのIOカードA3、B4の割り付けを管理する管理テーブル6と、各IOカードA3、B4において割り込みラインのいずれかに切り替る切替部A31、B41と、割り込みラインINTA〜Dのいずれかに異常が発生した通知を受けると、管理テーブル6の割り付けを変更して切替部A31、B41にて割り込みラインINTA〜Dの切り替えを指示し、異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを判定し、管理テーブル6に対して異常の対象となるIOカードA3、B4または割り込みラインINTA〜Dを特定の割り込みラインに割り付け、計算機システム100の再起動し特定の割り込みラインをマスクするRAS処理部7とを有する。【選択図】図1</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title COMPUTER SYSTEM
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