LOAD DRIVE CIRCUIT
PROBLEM TO BE SOLVED: To provide a load drive circuit capable of preventing an output power fault state from being detected erroneously.SOLUTION: The load drive circuit comprises: a switching element Q1; a first comparator CP1 which compares a first reference voltage V1 lower than a voltage E inputt...
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creator | OSONO YUTA |
description | PROBLEM TO BE SOLVED: To provide a load drive circuit capable of preventing an output power fault state from being detected erroneously.SOLUTION: The load drive circuit comprises: a switching element Q1; a first comparator CP1 which compares a first reference voltage V1 lower than a voltage E inputted to a power supply terminal Vcc with a voltage of an output terminal OUT and detects a load open state where the switching element Q1 is being turned off and a load 20 is not being connected to the output terminal; a second comparator CP2 which compares a reference voltage V2 lower than the voltage E and higher than a clamp voltage with the voltage of the output terminal OUT and detects the output power failure state; a clamp circuit 14 which clamps the voltage of the output terminal to the clamp voltage higher than the first reference voltage and lower than the voltage E in the load open state; a capacitor C1; a boot strap circuit 10 which supplies a charge current to an amp terminal by a constant voltage generated based on the voltage E of a power source; and a clamp voltage rise suppression circuit 16 which suppresses rising of the clamp voltage of the clamp circuit if the first comparator detects the load open state.SELECTED DRAWING: Figure 1
【課題】出力天絡状態の誤検出を防止することができる負荷駆動回路。【解決手段】スイッチング素子Q1、電源端子Vccに入力される電圧Eよりも低い第1の基準電圧V1と出力端子OUTの電圧とを比較してスイッチング素子Q1がオフ状態で且つ出力端子に負荷20が接続されていない負荷オープン状態を検出する第1のコンパレータCP1、電圧Eよりも低く且つクランプ電圧よりも高い第2の基準電圧V2と出力端子OUTの電圧とを比較して出力天絡状態を検出する第2のコンパレータCP2、負荷オープン状態である場合に、出力端子の電圧を第1の基準電圧よりも高く且つ電圧Eよりも低いクランプ電圧にクランプするクランプ回路14、コンデンサC1、電源の電圧Eに基づき生成された定電圧により充電電流をamp端子に供給するブートストラップ回路10、第1のコンパレータが負荷オープン状態を検出した場合にクランプ回路のクランプ電圧の上昇を抑止するクランプ電圧上昇抑止回路16とを備える。【選択図】図1 |
format | Patent |
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【課題】出力天絡状態の誤検出を防止することができる負荷駆動回路。【解決手段】スイッチング素子Q1、電源端子Vccに入力される電圧Eよりも低い第1の基準電圧V1と出力端子OUTの電圧とを比較してスイッチング素子Q1がオフ状態で且つ出力端子に負荷20が接続されていない負荷オープン状態を検出する第1のコンパレータCP1、電圧Eよりも低く且つクランプ電圧よりも高い第2の基準電圧V2と出力端子OUTの電圧とを比較して出力天絡状態を検出する第2のコンパレータCP2、負荷オープン状態である場合に、出力端子の電圧を第1の基準電圧よりも高く且つ電圧Eよりも低いクランプ電圧にクランプするクランプ回路14、コンデンサC1、電源の電圧Eに基づき生成された定電圧により充電電流をamp端子に供給するブートストラップ回路10、第1のコンパレータが負荷オープン状態を検出した場合にクランプ回路のクランプ電圧の上昇を抑止するクランプ電圧上昇抑止回路16とを備える。【選択図】図1</description><language>eng ; jpn</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160707&DB=EPODOC&CC=JP&NR=2016122965A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160707&DB=EPODOC&CC=JP&NR=2016122965A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OSONO YUTA</creatorcontrib><title>LOAD DRIVE CIRCUIT</title><description>PROBLEM TO BE SOLVED: To provide a load drive circuit capable of preventing an output power fault state from being detected erroneously.SOLUTION: The load drive circuit comprises: a switching element Q1; a first comparator CP1 which compares a first reference voltage V1 lower than a voltage E inputted to a power supply terminal Vcc with a voltage of an output terminal OUT and detects a load open state where the switching element Q1 is being turned off and a load 20 is not being connected to the output terminal; a second comparator CP2 which compares a reference voltage V2 lower than the voltage E and higher than a clamp voltage with the voltage of the output terminal OUT and detects the output power failure state; a clamp circuit 14 which clamps the voltage of the output terminal to the clamp voltage higher than the first reference voltage and lower than the voltage E in the load open state; a capacitor C1; a boot strap circuit 10 which supplies a charge current to an amp terminal by a constant voltage generated based on the voltage E of a power source; and a clamp voltage rise suppression circuit 16 which suppresses rising of the clamp voltage of the clamp circuit if the first comparator detects the load open state.SELECTED DRAWING: Figure 1
【課題】出力天絡状態の誤検出を防止することができる負荷駆動回路。【解決手段】スイッチング素子Q1、電源端子Vccに入力される電圧Eよりも低い第1の基準電圧V1と出力端子OUTの電圧とを比較してスイッチング素子Q1がオフ状態で且つ出力端子に負荷20が接続されていない負荷オープン状態を検出する第1のコンパレータCP1、電圧Eよりも低く且つクランプ電圧よりも高い第2の基準電圧V2と出力端子OUTの電圧とを比較して出力天絡状態を検出する第2のコンパレータCP2、負荷オープン状態である場合に、出力端子の電圧を第1の基準電圧よりも高く且つ電圧Eよりも低いクランプ電圧にクランプするクランプ回路14、コンデンサC1、電源の電圧Eに基づき生成された定電圧により充電電流をamp端子に供給するブートストラップ回路10、第1のコンパレータが負荷オープン状態を検出した場合にクランプ回路のクランプ電圧の上昇を抑止するクランプ電圧上昇抑止回路16とを備える。【選択図】図1</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBDy8Xd0UXAJ8gxzVXD2DHIO9QzhYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBoZmhkZGlmamjsZEKQIAaXkeXg</recordid><startdate>20160707</startdate><enddate>20160707</enddate><creator>OSONO YUTA</creator><scope>EVB</scope></search><sort><creationdate>20160707</creationdate><title>LOAD DRIVE CIRCUIT</title><author>OSONO YUTA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2016122965A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2016</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>OSONO YUTA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OSONO YUTA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LOAD DRIVE CIRCUIT</title><date>2016-07-07</date><risdate>2016</risdate><abstract>PROBLEM TO BE SOLVED: To provide a load drive circuit capable of preventing an output power fault state from being detected erroneously.SOLUTION: The load drive circuit comprises: a switching element Q1; a first comparator CP1 which compares a first reference voltage V1 lower than a voltage E inputted to a power supply terminal Vcc with a voltage of an output terminal OUT and detects a load open state where the switching element Q1 is being turned off and a load 20 is not being connected to the output terminal; a second comparator CP2 which compares a reference voltage V2 lower than the voltage E and higher than a clamp voltage with the voltage of the output terminal OUT and detects the output power failure state; a clamp circuit 14 which clamps the voltage of the output terminal to the clamp voltage higher than the first reference voltage and lower than the voltage E in the load open state; a capacitor C1; a boot strap circuit 10 which supplies a charge current to an amp terminal by a constant voltage generated based on the voltage E of a power source; and a clamp voltage rise suppression circuit 16 which suppresses rising of the clamp voltage of the clamp circuit if the first comparator detects the load open state.SELECTED DRAWING: Figure 1
【課題】出力天絡状態の誤検出を防止することができる負荷駆動回路。【解決手段】スイッチング素子Q1、電源端子Vccに入力される電圧Eよりも低い第1の基準電圧V1と出力端子OUTの電圧とを比較してスイッチング素子Q1がオフ状態で且つ出力端子に負荷20が接続されていない負荷オープン状態を検出する第1のコンパレータCP1、電圧Eよりも低く且つクランプ電圧よりも高い第2の基準電圧V2と出力端子OUTの電圧とを比較して出力天絡状態を検出する第2のコンパレータCP2、負荷オープン状態である場合に、出力端子の電圧を第1の基準電圧よりも高く且つ電圧Eよりも低いクランプ電圧にクランプするクランプ回路14、コンデンサC1、電源の電圧Eに基づき生成された定電圧により充電電流をamp端子に供給するブートストラップ回路10、第1のコンパレータが負荷オープン状態を検出した場合にクランプ回路のクランプ電圧の上昇を抑止するクランプ電圧上昇抑止回路16とを備える。【選択図】図1</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
title | LOAD DRIVE CIRCUIT |
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