ELECTRONIC DEVICE

PROBLEM TO BE SOLVED: To provide an electronic device in which the linear expansion coefficient of a wiring board can be reduced, curvature deformation of the wiring board can be suppressed and eventually warp of the whole device can be suppressed by reducing the linear expansion coefficient of an area where an inner layer conductor is buried in a built-up layer.SOLUTION: In a plate-shaped built-up layer 30 as a prepreg obtained by sealing glass clothes 1, 2 with insulating resin 3, the first glass cloth 1 is located in a first area R1 which is nearer to an outer surface 30b than an inner layer conductor 51 in the thickness direction of the built-up layer 30 in the resin 3, the second glass cloth 2 is located in a second area R2 corresponding to the thickness d of the inner layer conductor 51 from the inner surface 30a in the thickness direction of the built-up layer 30 in the resin 3, the second glass cloth 2 is provided with a through-hole 2a, and the inner layer conductor 51 is disposed in the through-hole 2a. Therefore, the arrangement is planar such that the second glass cloth 2 is interposed at the interval of the inner layer conductor 51 in the resin 3. 【課題】ビルドアップ層において内層導体が埋め込まれている領域の線膨張率を低くすることにより、配線基板の低線膨張率化を図り、配線基板の反り変形を抑制し、ひいては装置全体の反りを抑制できるようにする。【解決手段】ガラスクロス１、２を絶縁性の樹脂３で封止してなるプリプレグとしての板状のビルドアップ層３０において、第１のガラスクロス１は、樹脂３内にてビルドアップ層３０の厚さ方向における内層導体５１よりも外面３０ｂ寄りの第１の領域Ｒ１に位置し、第２のガラスクロス２は、樹脂３内にてビルドアップ層３０の厚さ方向における内面３０ａから内層導体５１の厚さｄ分相当の第２の領域Ｒ２に位置する。第２のガラスクロス２には貫通孔２ａが設けられ、内層導体５１は貫通孔２ａ内に配置されることにより、樹脂３内にて、内層導体５１の間隙に第２のガラスクロス２が介在する平面的な配置とされている。【選択図】図２