SEMICONDUCTOR DEVICE MANUFACTURING METHOD
PROBLEM TO BE SOLVED: To reduce loss of a resin material for forming an insulation film and form a pattern with high accuracy.SOLUTION: A semiconductor device manufacturing method including a formation process of an insulation film for a protection film, an encapsulation film and the like comprises...
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creator | MIYAMOTO TSUTOMU SEKITA NOBUATSU KANEKO NORIHIKO KONO ICHIRO |
description | PROBLEM TO BE SOLVED: To reduce loss of a resin material for forming an insulation film and form a pattern with high accuracy.SOLUTION: A semiconductor device manufacturing method including a formation process of an insulation film for a protection film, an encapsulation film and the like comprises the steps of: forming on a connection pad 11 electrically connected with a circuit element formed on a principal surface or on a semiconductor substrate 10 having rewiring 16 connected to the connection pad 11, insulating photosensitive resin films 17a, 17b on a region except at least an edge of the substrate 10 by ink jet; and subsequently making the photosensitive resin film 17a be subjected to patterning by a photolithography technique.
【課題】絶縁膜を形成するための樹脂材料の無駄を低減し、且つ精度良くパターンを形成する。【解決手段】保護膜や封止膜等の絶縁膜の形成工程を含む半導体装置の製造方法であって、主面に形成された回路素子と電気的に接続する接続パッド11又は該接続パッド11に接続された再配線16を有する半導体基板10上に、基板10の少なくともエッジ部を除いて、インクジェットにより絶縁性の感光性樹脂膜17a,17bを形成した後、感光性樹脂膜17aをフォトリソグラフィ技術によりパターニングする。【選択図】 図3 |
format | Patent |
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【課題】絶縁膜を形成するための樹脂材料の無駄を低減し、且つ精度良くパターンを形成する。【解決手段】保護膜や封止膜等の絶縁膜の形成工程を含む半導体装置の製造方法であって、主面に形成された回路素子と電気的に接続する接続パッド11又は該接続パッド11に接続された再配線16を有する半導体基板10上に、基板10の少なくともエッジ部を除いて、インクジェットにより絶縁性の感光性樹脂膜17a,17bを形成した後、感光性樹脂膜17aをフォトリソグラフィ技術によりパターニングする。【選択図】 図3</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151001&DB=EPODOC&CC=JP&NR=2015173253A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25555,76308</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151001&DB=EPODOC&CC=JP&NR=2015173253A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MIYAMOTO TSUTOMU</creatorcontrib><creatorcontrib>SEKITA NOBUATSU</creatorcontrib><creatorcontrib>KANEKO NORIHIKO</creatorcontrib><creatorcontrib>KONO ICHIRO</creatorcontrib><title>SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><description>PROBLEM TO BE SOLVED: To reduce loss of a resin material for forming an insulation film and form a pattern with high accuracy.SOLUTION: A semiconductor device manufacturing method including a formation process of an insulation film for a protection film, an encapsulation film and the like comprises the steps of: forming on a connection pad 11 electrically connected with a circuit element formed on a principal surface or on a semiconductor substrate 10 having rewiring 16 connected to the connection pad 11, insulating photosensitive resin films 17a, 17b on a region except at least an edge of the substrate 10 by ink jet; and subsequently making the photosensitive resin film 17a be subjected to patterning by a photolithography technique.
【課題】絶縁膜を形成するための樹脂材料の無駄を低減し、且つ精度良くパターンを形成する。【解決手段】保護膜や封止膜等の絶縁膜の形成工程を含む半導体装置の製造方法であって、主面に形成された回路素子と電気的に接続する接続パッド11又は該接続パッド11に接続された再配線16を有する半導体基板10上に、基板10の少なくともエッジ部を除いて、インクジェットにより絶縁性の感光性樹脂膜17a,17bを形成した後、感光性樹脂膜17aをフォトリソグラフィ技術によりパターニングする。【選択図】 図3</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAMdvX1dPb3cwl1DvEPUnBxDfN0dlXwdfQLdXN0DgkN8vRzV_B1DfHwd-FhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGhqaG5sZGpsaOxkQpAgCNvSUC</recordid><startdate>20151001</startdate><enddate>20151001</enddate><creator>MIYAMOTO TSUTOMU</creator><creator>SEKITA NOBUATSU</creator><creator>KANEKO NORIHIKO</creator><creator>KONO ICHIRO</creator><scope>EVB</scope></search><sort><creationdate>20151001</creationdate><title>SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><author>MIYAMOTO TSUTOMU ; SEKITA NOBUATSU ; KANEKO NORIHIKO ; KONO ICHIRO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2015173253A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MIYAMOTO TSUTOMU</creatorcontrib><creatorcontrib>SEKITA NOBUATSU</creatorcontrib><creatorcontrib>KANEKO NORIHIKO</creatorcontrib><creatorcontrib>KONO ICHIRO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MIYAMOTO TSUTOMU</au><au>SEKITA NOBUATSU</au><au>KANEKO NORIHIKO</au><au>KONO ICHIRO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE MANUFACTURING METHOD</title><date>2015-10-01</date><risdate>2015</risdate><abstract>PROBLEM TO BE SOLVED: To reduce loss of a resin material for forming an insulation film and form a pattern with high accuracy.SOLUTION: A semiconductor device manufacturing method including a formation process of an insulation film for a protection film, an encapsulation film and the like comprises the steps of: forming on a connection pad 11 electrically connected with a circuit element formed on a principal surface or on a semiconductor substrate 10 having rewiring 16 connected to the connection pad 11, insulating photosensitive resin films 17a, 17b on a region except at least an edge of the substrate 10 by ink jet; and subsequently making the photosensitive resin film 17a be subjected to patterning by a photolithography technique.
【課題】絶縁膜を形成するための樹脂材料の無駄を低減し、且つ精度良くパターンを形成する。【解決手段】保護膜や封止膜等の絶縁膜の形成工程を含む半導体装置の製造方法であって、主面に形成された回路素子と電気的に接続する接続パッド11又は該接続パッド11に接続された再配線16を有する半導体基板10上に、基板10の少なくともエッジ部を除いて、インクジェットにより絶縁性の感光性樹脂膜17a,17bを形成した後、感光性樹脂膜17aをフォトリソグラフィ技術によりパターニングする。【選択図】 図3</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR DEVICE MANUFACTURING METHOD |
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