D/A CONVERTER
PROBLEM TO BE SOLVED: To shorten a settling time by reducing a conversion error irrespective of a change in conversion input data.SOLUTION: A first conversion circuit 2 is a voltage potentiometer type D/A converter and D/A-converts lower two bits of data DA. A second conversion circuit 3 is a D/A co...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | ISOMURA HIROBUMI |
description | PROBLEM TO BE SOLVED: To shorten a settling time by reducing a conversion error irrespective of a change in conversion input data.SOLUTION: A first conversion circuit 2 is a voltage potentiometer type D/A converter and D/A-converts lower two bits of data DA. A second conversion circuit 3 is a D/A converter using a capacitor array 22 and D/A-converts upper two bits of the data DA. When the data DA changes from the preceding D/A conversion period, SEL, switches SW1, SW2 and switches SW3, SW4 are turned to H (A side), a C side and an A side, respectively, for initialization in a first initialization mode using a D/A conversion voltage of the upper two bits of the data DA as an initialization voltage. When the data DA remains unchanged from the preceding D/A conversion period, SEL, the switches SW1, SW2 and the switches SW3, SW4 are turned to L (B side), the C side and a B side, respectively, for initialization in a second initialization mode using the preceding D/A conversion voltage VDA as an initialization voltage. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2014165719A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2014165719A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2014165719A3</originalsourceid><addsrcrecordid>eNrjZOB10XdUcPb3C3MNCnEN4mFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgaGJoZmpuaGlo7GRCkCANSOHPw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>D/A CONVERTER</title><source>esp@cenet</source><creator>ISOMURA HIROBUMI</creator><creatorcontrib>ISOMURA HIROBUMI</creatorcontrib><description>PROBLEM TO BE SOLVED: To shorten a settling time by reducing a conversion error irrespective of a change in conversion input data.SOLUTION: A first conversion circuit 2 is a voltage potentiometer type D/A converter and D/A-converts lower two bits of data DA. A second conversion circuit 3 is a D/A converter using a capacitor array 22 and D/A-converts upper two bits of the data DA. When the data DA changes from the preceding D/A conversion period, SEL, switches SW1, SW2 and switches SW3, SW4 are turned to H (A side), a C side and an A side, respectively, for initialization in a first initialization mode using a D/A conversion voltage of the upper two bits of the data DA as an initialization voltage. When the data DA remains unchanged from the preceding D/A conversion period, SEL, the switches SW1, SW2 and the switches SW3, SW4 are turned to L (B side), the C side and a B side, respectively, for initialization in a second initialization mode using the preceding D/A conversion voltage VDA as an initialization voltage.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140908&DB=EPODOC&CC=JP&NR=2014165719A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140908&DB=EPODOC&CC=JP&NR=2014165719A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ISOMURA HIROBUMI</creatorcontrib><title>D/A CONVERTER</title><description>PROBLEM TO BE SOLVED: To shorten a settling time by reducing a conversion error irrespective of a change in conversion input data.SOLUTION: A first conversion circuit 2 is a voltage potentiometer type D/A converter and D/A-converts lower two bits of data DA. A second conversion circuit 3 is a D/A converter using a capacitor array 22 and D/A-converts upper two bits of the data DA. When the data DA changes from the preceding D/A conversion period, SEL, switches SW1, SW2 and switches SW3, SW4 are turned to H (A side), a C side and an A side, respectively, for initialization in a first initialization mode using a D/A conversion voltage of the upper two bits of the data DA as an initialization voltage. When the data DA remains unchanged from the preceding D/A conversion period, SEL, the switches SW1, SW2 and the switches SW3, SW4 are turned to L (B side), the C side and a B side, respectively, for initialization in a second initialization mode using the preceding D/A conversion voltage VDA as an initialization voltage.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOB10XdUcPb3C3MNCnEN4mFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgaGJoZmpuaGlo7GRCkCANSOHPw</recordid><startdate>20140908</startdate><enddate>20140908</enddate><creator>ISOMURA HIROBUMI</creator><scope>EVB</scope></search><sort><creationdate>20140908</creationdate><title>D/A CONVERTER</title><author>ISOMURA HIROBUMI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2014165719A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>ISOMURA HIROBUMI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ISOMURA HIROBUMI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>D/A CONVERTER</title><date>2014-09-08</date><risdate>2014</risdate><abstract>PROBLEM TO BE SOLVED: To shorten a settling time by reducing a conversion error irrespective of a change in conversion input data.SOLUTION: A first conversion circuit 2 is a voltage potentiometer type D/A converter and D/A-converts lower two bits of data DA. A second conversion circuit 3 is a D/A converter using a capacitor array 22 and D/A-converts upper two bits of the data DA. When the data DA changes from the preceding D/A conversion period, SEL, switches SW1, SW2 and switches SW3, SW4 are turned to H (A side), a C side and an A side, respectively, for initialization in a first initialization mode using a D/A conversion voltage of the upper two bits of the data DA as an initialization voltage. When the data DA remains unchanged from the preceding D/A conversion period, SEL, the switches SW1, SW2 and the switches SW3, SW4 are turned to L (B side), the C side and a B side, respectively, for initialization in a second initialization mode using the preceding D/A conversion voltage VDA as an initialization voltage.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_JP2014165719A |
source | esp@cenet |
subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY |
title | D/A CONVERTER |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-19T03%3A07%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ISOMURA%20HIROBUMI&rft.date=2014-09-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2014165719A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |