MEMORY FAULT DIAGNOSTIC DEVICE AND MEMORY FAULT DIAGNOSTIC METHOD
PROBLEM TO BE SOLVED: To provide a memory fault diagnostic device and a memory fault diagnostic method that can diagnose a fault of a memory in a minimum time by using an interval time after application execution within a preset control period, and minimize the fault diagnostic time of all the memor...
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| creator | SAMEDA YOSHITOMI NAKATANI HIROSHI AMAGI SATOSHI TOKO MAKOTO ONISHI NAOYA |
| description | PROBLEM TO BE SOLVED: To provide a memory fault diagnostic device and a memory fault diagnostic method that can diagnose a fault of a memory in a minimum time by using an interval time after application execution within a preset control period, and minimize the fault diagnostic time of all the memory in an area to be diagnosed.SOLUTION: The area of a memory includes a diagnostic area 41 and a non-diagnostic area 42, the diagnostic area is divided into a plurality of Row areas which do not overlap each other, and each Row area is further divided into a plurality of Cell areas which do not overlap each other. A memory fault diagnostic method includes taking a diagnosis in two layers of an in-Row-area diagnostic step of making a diagnosis between Cell areas of all combinations with one cell area in a Row area and an inter-Row-area diagnostic step of making a diagnosis between Row areas of all combinations with one combination of Row areas in the diagnostic area, the Row areas being so sized that an in-Row-area diagnostic time is equal to an inter-Row-area diagnostic time. |
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A memory fault diagnostic method includes taking a diagnosis in two layers of an in-Row-area diagnostic step of making a diagnosis between Cell areas of all combinations with one cell area in a Row area and an inter-Row-area diagnostic step of making a diagnosis between Row areas of all combinations with one combination of Row areas in the diagnostic area, the Row areas being so sized that an in-Row-area diagnostic time is equal to an inter-Row-area diagnostic time.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140421&DB=EPODOC&CC=JP&NR=2014071770A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140421&DB=EPODOC&CC=JP&NR=2014071770A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SAMEDA YOSHITOMI</creatorcontrib><creatorcontrib>NAKATANI HIROSHI</creatorcontrib><creatorcontrib>AMAGI SATOSHI</creatorcontrib><creatorcontrib>TOKO MAKOTO</creatorcontrib><creatorcontrib>ONISHI NAOYA</creatorcontrib><title>MEMORY FAULT DIAGNOSTIC DEVICE AND MEMORY FAULT DIAGNOSTIC METHOD</title><description>PROBLEM TO BE SOLVED: To provide a memory fault diagnostic device and a memory fault diagnostic method that can diagnose a fault of a memory in a minimum time by using an interval time after application execution within a preset control period, and minimize the fault diagnostic time of all the memory in an area to be diagnosed.SOLUTION: The area of a memory includes a diagnostic area 41 and a non-diagnostic area 42, the diagnostic area is divided into a plurality of Row areas which do not overlap each other, and each Row area is further divided into a plurality of Cell areas which do not overlap each other. A memory fault diagnostic method includes taking a diagnosis in two layers of an in-Row-area diagnostic step of making a diagnosis between Cell areas of all combinations with one cell area in a Row area and an inter-Row-area diagnostic step of making a diagnosis between Row areas of all combinations with one combination of Row areas in the diagnostic area, the Row areas being so sized that an in-Row-area diagnostic time is equal to an inter-Row-area diagnostic time.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHD0dfX1D4pUcHMM9QlRcPF0dPfzDw7xdFZwcQ3zdHZVcPRzUcClxNc1xMPfhYeBNS0xpziVF0pzMyi5uYY4e-imFuTHpxYXJCan5qWWxHsFGBkYmhiYG5qbGzgaE6UIACWOK04</recordid><startdate>20140421</startdate><enddate>20140421</enddate><creator>SAMEDA YOSHITOMI</creator><creator>NAKATANI HIROSHI</creator><creator>AMAGI SATOSHI</creator><creator>TOKO MAKOTO</creator><creator>ONISHI NAOYA</creator><scope>EVB</scope></search><sort><creationdate>20140421</creationdate><title>MEMORY FAULT DIAGNOSTIC DEVICE AND MEMORY FAULT DIAGNOSTIC METHOD</title><author>SAMEDA YOSHITOMI ; NAKATANI HIROSHI ; AMAGI SATOSHI ; TOKO MAKOTO ; ONISHI NAOYA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2014071770A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SAMEDA YOSHITOMI</creatorcontrib><creatorcontrib>NAKATANI HIROSHI</creatorcontrib><creatorcontrib>AMAGI SATOSHI</creatorcontrib><creatorcontrib>TOKO MAKOTO</creatorcontrib><creatorcontrib>ONISHI NAOYA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SAMEDA YOSHITOMI</au><au>NAKATANI HIROSHI</au><au>AMAGI SATOSHI</au><au>TOKO MAKOTO</au><au>ONISHI NAOYA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMORY FAULT DIAGNOSTIC DEVICE AND MEMORY FAULT DIAGNOSTIC METHOD</title><date>2014-04-21</date><risdate>2014</risdate><abstract>PROBLEM TO BE SOLVED: To provide a memory fault diagnostic device and a memory fault diagnostic method that can diagnose a fault of a memory in a minimum time by using an interval time after application execution within a preset control period, and minimize the fault diagnostic time of all the memory in an area to be diagnosed.SOLUTION: The area of a memory includes a diagnostic area 41 and a non-diagnostic area 42, the diagnostic area is divided into a plurality of Row areas which do not overlap each other, and each Row area is further divided into a plurality of Cell areas which do not overlap each other. A memory fault diagnostic method includes taking a diagnosis in two layers of an in-Row-area diagnostic step of making a diagnosis between Cell areas of all combinations with one cell area in a Row area and an inter-Row-area diagnostic step of making a diagnosis between Row areas of all combinations with one combination of Row areas in the diagnostic area, the Row areas being so sized that an in-Row-area diagnostic time is equal to an inter-Row-area diagnostic time.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | MEMORY FAULT DIAGNOSTIC DEVICE AND MEMORY FAULT DIAGNOSTIC METHOD |
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