MEMS DEVICE AND INTERPOSER AND METHOD FOR INTEGRATING MEMS DEVICE AND INTERPOSER

PROBLEM TO BE SOLVED: To provide a method for producing a structure with a substrate that is well matched to a MEMS device in thermal expansion.SOLUTION: The method is based on a method of Bonded and Etched-Back Silicon-On-Insulator (hereinbelow referred to as BESOI). The BESOI method includes an SO...

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1. Verfasser:	SAWYER WILLIAM D
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GYROSCOPIC INSTRUMENTS INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT MEASURING MEASURING DISTANCES, LEVELS OR BEARINGS MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION,OR SHOCK MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES MICROSTRUCTURAL TECHNOLOGY NAVIGATION PERFORMING OPERATIONS PHOTOGRAMMETRY OR VIDEOGRAMMETRY PHYSICS PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS SEMICONDUCTOR DEVICES SURVEYING TESTING TRANSPORTING
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Zusammenfassung:	PROBLEM TO BE SOLVED: To provide a method for producing a structure with a substrate that is well matched to a MEMS device in thermal expansion.SOLUTION: The method is based on a method of Bonded and Etched-Back Silicon-On-Insulator (hereinbelow referred to as BESOI). The BESOI method includes an SOI wafer 40 that includes a handle layer 46, a dielectric layer 44 formed of a silicon dioxide and a device layer 42. The device layer 42 of the SOI wafer 40 is subjected to mesa etching to form a pattern thereon, and then the SOI wafer 40 is bonded to another substrate having a patterned device layer. The handle layer 46 and the dielectric layer 44 of the SOI wafer 40 are then removed by etching, and further the device layer 42 is etched to form a MEMS device. In the BESOI method, structure etching is performed after the silicon dioxide dielectric layer 44 is removed.