LAYOUT DESIGN FOR HIGH POWER, GALLIUM NITRIDE BASED FET

PROBLEM TO BE SOLVED: To provide an FET.SOLUTION: The FET includes a substrate, a buffer layer disposed on the substrate, a channel layer disposed over the buffer layer and a barrier layer disposed over the channel layer. Source, gate and drain electrodes are located over the barrier layer and exten...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	BORIS PERES, LINLIN LIU, MILAN POFFLEY STITCH
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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