FLASH MEMORY CELL ARRAY HAVING DUAL CONTROL GATES PER MEMORY CELL CHARGE STORAGE ELEMENT

PROBLEM TO BE SOLVED: To provide a flash NAND type EEPROM system, wherein floating gates are capacitively coupled with at least two control gate lines.SOLUTION: The control gate lines are positioned between floating gates to be coupled with sidewalls of floating gates. The memory cell coupling ratio...

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Bibliographische Detailangaben

1. Verfasser:	HARARI ELIYAHOU
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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