INTEGRATED CIRCUIT AND FAILURE DIAGNOSTIC CIRCUIT
PROBLEM TO BE SOLVED: To easily perform a motion transition from a failure diagnostic motion to a normal motion. SOLUTION: A disclosed device is equipped with: a first storage circuit and a plurality of second storage circuits. The first storage circuit holds input data output from an input selectio...
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| creator | INAGAWA RYOICHI |
| description | PROBLEM TO BE SOLVED: To easily perform a motion transition from a failure diagnostic motion to a normal motion. SOLUTION: A disclosed device is equipped with: a first storage circuit and a plurality of second storage circuits. The first storage circuit holds input data output from an input selection circuit or scan data according to a first control signal. The plurality of second storage circuits each hold data output from the first storage circuit according to the first control signal or a second control signal for holding forcefully holding data independently of the first control signal. A control signal output circuit outputs either the first control signal or the second control signal to each of the plurality of second storage circuits. An output selection circuit selects one second storage circuit out of the plurality of second storage circuits and outputs data output from a selected second storage circuit. COPYRIGHT: (C)2011,JPO&INPIT |
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SOLUTION: A disclosed device is equipped with: a first storage circuit and a plurality of second storage circuits. The first storage circuit holds input data output from an input selection circuit or scan data according to a first control signal. The plurality of second storage circuits each hold data output from the first storage circuit according to the first control signal or a second control signal for holding forcefully holding data independently of the first control signal. A control signal output circuit outputs either the first control signal or the second control signal to each of the plurality of second storage circuits. An output selection circuit selects one second storage circuit out of the plurality of second storage circuits and outputs data output from a selected second storage circuit. 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SOLUTION: A disclosed device is equipped with: a first storage circuit and a plurality of second storage circuits. The first storage circuit holds input data output from an input selection circuit or scan data according to a first control signal. The plurality of second storage circuits each hold data output from the first storage circuit according to the first control signal or a second control signal for holding forcefully holding data independently of the first control signal. A control signal output circuit outputs either the first control signal or the second control signal to each of the plurality of second storage circuits. An output selection circuit selects one second storage circuit out of the plurality of second storage circuits and outputs data output from a selected second storage circuit. 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SOLUTION: A disclosed device is equipped with: a first storage circuit and a plurality of second storage circuits. The first storage circuit holds input data output from an input selection circuit or scan data according to a first control signal. The plurality of second storage circuits each hold data output from the first storage circuit according to the first control signal or a second control signal for holding forcefully holding data independently of the first control signal. A control signal output circuit outputs either the first control signal or the second control signal to each of the plurality of second storage circuits. An output selection circuit selects one second storage circuit out of the plurality of second storage circuits and outputs data output from a selected second storage circuit. COPYRIGHT: (C)2011,JPO&INPIT</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING |
| title | INTEGRATED CIRCUIT AND FAILURE DIAGNOSTIC CIRCUIT |
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