CURRENT MODE SWITCHING REGULATOR
PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to prevent degradation in efficiency under light load or no load and exclude ripples in output voltage. SOLUTION: The current mode switching regulator 100 includes a higher-order transistor QH and a lower-order transistor...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | NAKAGAWA EIJI HIGASHIDA YOSHIO |
| description | PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to prevent degradation in efficiency under light load or no load and exclude ripples in output voltage. SOLUTION: The current mode switching regulator 100 includes a higher-order transistor QH and a lower-order transistor QL, a switching output circuit 180 that generates output voltage Vout1 in proportion to input voltage Vin1, and an output terminal 190 for outputting the output voltage Vout1. The switching regulator further includes a current detection comparator 124 that detects a current passed through the higher-order transistor QH and a switching circuit 122 that controls the operation of the current detection comparator 124. The switching circuit 122 is controlled by a load detection circuit 140 that compares the pulse widths of the respective gate pulses SH, SL of the higher-order transistor QH and the lower-order transistor QL with the pulse width of switching voltage Vsw1. The operating period of the current detection comparator 124 is determined by the load detection circuit 140. COPYRIGHT: (C)2011,JPO&INPIT |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2011072101A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2011072101A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2011072101A3</originalsourceid><addsrcrecordid>eNrjZFBwDg0KcvULUfD1d3FVCA73DHH28PRzVwhydQ_1cQzxD-JhYE1LzClO5YXS3AxKbq5ARbqpBfnxqcUFicmpeakl8V4BRgaGhgbmRoYGho7GRCkCAEiKImY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CURRENT MODE SWITCHING REGULATOR</title><source>esp@cenet</source><creator>NAKAGAWA EIJI ; HIGASHIDA YOSHIO</creator><creatorcontrib>NAKAGAWA EIJI ; HIGASHIDA YOSHIO</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to prevent degradation in efficiency under light load or no load and exclude ripples in output voltage. SOLUTION: The current mode switching regulator 100 includes a higher-order transistor QH and a lower-order transistor QL, a switching output circuit 180 that generates output voltage Vout1 in proportion to input voltage Vin1, and an output terminal 190 for outputting the output voltage Vout1. The switching regulator further includes a current detection comparator 124 that detects a current passed through the higher-order transistor QH and a switching circuit 122 that controls the operation of the current detection comparator 124. The switching circuit 122 is controlled by a load detection circuit 140 that compares the pulse widths of the respective gate pulses SH, SL of the higher-order transistor QH and the lower-order transistor QL with the pulse width of switching voltage Vsw1. The operating period of the current detection comparator 124 is determined by the load detection circuit 140. COPYRIGHT: (C)2011,JPO&INPIT</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; CONTROL OR REGULATION THEREOF ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; GENERATION</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110407&DB=EPODOC&CC=JP&NR=2011072101A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110407&DB=EPODOC&CC=JP&NR=2011072101A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NAKAGAWA EIJI</creatorcontrib><creatorcontrib>HIGASHIDA YOSHIO</creatorcontrib><title>CURRENT MODE SWITCHING REGULATOR</title><description>PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to prevent degradation in efficiency under light load or no load and exclude ripples in output voltage. SOLUTION: The current mode switching regulator 100 includes a higher-order transistor QH and a lower-order transistor QL, a switching output circuit 180 that generates output voltage Vout1 in proportion to input voltage Vin1, and an output terminal 190 for outputting the output voltage Vout1. The switching regulator further includes a current detection comparator 124 that detects a current passed through the higher-order transistor QH and a switching circuit 122 that controls the operation of the current detection comparator 124. The switching circuit 122 is controlled by a load detection circuit 140 that compares the pulse widths of the respective gate pulses SH, SL of the higher-order transistor QH and the lower-order transistor QL with the pulse width of switching voltage Vsw1. The operating period of the current detection comparator 124 is determined by the load detection circuit 140. COPYRIGHT: (C)2011,JPO&INPIT</description><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBwDg0KcvULUfD1d3FVCA73DHH28PRzVwhydQ_1cQzxD-JhYE1LzClO5YXS3AxKbq5ARbqpBfnxqcUFicmpeakl8V4BRgaGhgbmRoYGho7GRCkCAEiKImY</recordid><startdate>20110407</startdate><enddate>20110407</enddate><creator>NAKAGAWA EIJI</creator><creator>HIGASHIDA YOSHIO</creator><scope>EVB</scope></search><sort><creationdate>20110407</creationdate><title>CURRENT MODE SWITCHING REGULATOR</title><author>NAKAGAWA EIJI ; HIGASHIDA YOSHIO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2011072101A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><toplevel>online_resources</toplevel><creatorcontrib>NAKAGAWA EIJI</creatorcontrib><creatorcontrib>HIGASHIDA YOSHIO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NAKAGAWA EIJI</au><au>HIGASHIDA YOSHIO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CURRENT MODE SWITCHING REGULATOR</title><date>2011-04-07</date><risdate>2011</risdate><abstract>PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to prevent degradation in efficiency under light load or no load and exclude ripples in output voltage. SOLUTION: The current mode switching regulator 100 includes a higher-order transistor QH and a lower-order transistor QL, a switching output circuit 180 that generates output voltage Vout1 in proportion to input voltage Vin1, and an output terminal 190 for outputting the output voltage Vout1. The switching regulator further includes a current detection comparator 124 that detects a current passed through the higher-order transistor QH and a switching circuit 122 that controls the operation of the current detection comparator 124. The switching circuit 122 is controlled by a load detection circuit 140 that compares the pulse widths of the respective gate pulses SH, SL of the higher-order transistor QH and the lower-order transistor QL with the pulse width of switching voltage Vsw1. The operating period of the current detection comparator 124 is determined by the load detection circuit 140. COPYRIGHT: (C)2011,JPO&INPIT</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_JP2011072101A |
| source | esp@cenet |
| subjects | APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY GENERATION |
| title | CURRENT MODE SWITCHING REGULATOR |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T13%3A34%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NAKAGAWA%20EIJI&rft.date=2011-04-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2011072101A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |