BUILT-IN TEST CIRCUIT, INTEGRATED CIRCUIT DEVICE, METHOD OF INITIALIZATION TEST OF SYNCHRONOUS CIRCUIT HAVING SCAN FUNCTION, AND METHOD OF GENERATING TEST PATTERN DATA

PROBLEM TO BE SOLVED: To easily perform an initialization test of a scan FF circuit by a simple design flow without providing any dedicated pads. SOLUTION: A built-in test circuit 2 includes: a scan chain 14 to which a plurality of synchronous circuits 12 having scan functions that are utilized as synchronous circuits of a circuit 10 to be integrated and tested and can be initialized are connected in series, while a common clock signal is inputted to the plurality of synchronous circuits 12 having scan functions; a counter 16 for counting the number of clocks of clock signals to be inputted to the plurality of synchronous circuits 12 having scan functions; and an initialization circuit 17 for outputting initialization signals to the plurality of synchronous circuits 12 having scan functions. Then, the initialization circuit 17 outputs initialization signals when the counter 16 counts a value not less than the number of the plurality of synchronous circuits 12 having scan functions connected in series by the scan chain 14. COPYRIGHT: (C)2011,JPO&INPIT