INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS

PROBLEM TO BE SOLVED: To provide an integrated circuit device capable of efficiently arranging I/O cells, and to provide an electronic apparatus or the like. SOLUTION: The integrated circuit device includes: a plurality of I/O cells, each of which comprising an I/O circuit and a pad; and a core circ...

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1. Verfasser: HARIKAE YUSUKE
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creator HARIKAE YUSUKE
description PROBLEM TO BE SOLVED: To provide an integrated circuit device capable of efficiently arranging I/O cells, and to provide an electronic apparatus or the like. SOLUTION: The integrated circuit device includes: a plurality of I/O cells, each of which comprising an I/O circuit and a pad; and a core circuit 102. When it is assumed that a direction from an outer edge 101 of a chip toward the core circuit 102 is a first direction, a first I/O circuit 11 of a first I/O cell 10 of the plurality of I/O cells and a second I/O circuit 21 of a second I/O cell 20 of the plurality of I/O cells are arranged side by side along the first direction. When it is assumed that a direction perpendicular to the first direction is a second direction, a first pad 12 of the first I/O cell 10 is arranged in the second direction of the first I/O circuit 11. COPYRIGHT: (C)2011,JPO&INPIT
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2010262978A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2010262978A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2010262978A3</originalsourceid><addsrcrecordid>eNrjZDDy9AtxdQ9yDHF1UXD2DHIO9QxRcHEN83R2VXD0c1Fw9XF1Dgny9_N0VnAMCHAEqgsN5mFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgaGBkZmRpbmFo7GRCkCAMQNJ00</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS</title><source>esp@cenet</source><creator>HARIKAE YUSUKE</creator><creatorcontrib>HARIKAE YUSUKE</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide an integrated circuit device capable of efficiently arranging I/O cells, and to provide an electronic apparatus or the like. SOLUTION: The integrated circuit device includes: a plurality of I/O cells, each of which comprising an I/O circuit and a pad; and a core circuit 102. When it is assumed that a direction from an outer edge 101 of a chip toward the core circuit 102 is a first direction, a first I/O circuit 11 of a first I/O cell 10 of the plurality of I/O cells and a second I/O circuit 21 of a second I/O cell 20 of the plurality of I/O cells are arranged side by side along the first direction. When it is assumed that a direction perpendicular to the first direction is a second direction, a first pad 12 of the first I/O cell 10 is arranged in the second direction of the first I/O circuit 11. COPYRIGHT: (C)2011,JPO&amp;INPIT</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20101118&amp;DB=EPODOC&amp;CC=JP&amp;NR=2010262978A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20101118&amp;DB=EPODOC&amp;CC=JP&amp;NR=2010262978A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HARIKAE YUSUKE</creatorcontrib><title>INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS</title><description>PROBLEM TO BE SOLVED: To provide an integrated circuit device capable of efficiently arranging I/O cells, and to provide an electronic apparatus or the like. SOLUTION: The integrated circuit device includes: a plurality of I/O cells, each of which comprising an I/O circuit and a pad; and a core circuit 102. When it is assumed that a direction from an outer edge 101 of a chip toward the core circuit 102 is a first direction, a first I/O circuit 11 of a first I/O cell 10 of the plurality of I/O cells and a second I/O circuit 21 of a second I/O cell 20 of the plurality of I/O cells are arranged side by side along the first direction. When it is assumed that a direction perpendicular to the first direction is a second direction, a first pad 12 of the first I/O cell 10 is arranged in the second direction of the first I/O circuit 11. COPYRIGHT: (C)2011,JPO&amp;INPIT</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDy9AtxdQ9yDHF1UXD2DHIO9QxRcHEN83R2VXD0c1Fw9XF1Dgny9_N0VnAMCHAEqgsN5mFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgaGBkZmRpbmFo7GRCkCAMQNJ00</recordid><startdate>20101118</startdate><enddate>20101118</enddate><creator>HARIKAE YUSUKE</creator><scope>EVB</scope></search><sort><creationdate>20101118</creationdate><title>INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS</title><author>HARIKAE YUSUKE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2010262978A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HARIKAE YUSUKE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HARIKAE YUSUKE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS</title><date>2010-11-18</date><risdate>2010</risdate><abstract>PROBLEM TO BE SOLVED: To provide an integrated circuit device capable of efficiently arranging I/O cells, and to provide an electronic apparatus or the like. SOLUTION: The integrated circuit device includes: a plurality of I/O cells, each of which comprising an I/O circuit and a pad; and a core circuit 102. When it is assumed that a direction from an outer edge 101 of a chip toward the core circuit 102 is a first direction, a first I/O circuit 11 of a first I/O cell 10 of the plurality of I/O cells and a second I/O circuit 21 of a second I/O cell 20 of the plurality of I/O cells are arranged side by side along the first direction. When it is assumed that a direction perpendicular to the first direction is a second direction, a first pad 12 of the first I/O cell 10 is arranged in the second direction of the first I/O circuit 11. COPYRIGHT: (C)2011,JPO&amp;INPIT</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
title INTEGRATED CIRCUIT DEVICE AND ELECTRONIC APPARATUS
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T23%3A22%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HARIKAE%20YUSUKE&rft.date=2010-11-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2010262978A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true