DISPLAY CONTROLLER

PROBLEM TO BE SOLVED: To provide a display controller capable of appropriately controlling the ON/OFF timing of a liquid crystal display and a backlight when the output of a clock signal is stopped or resumed. SOLUTION: A first counter 220 and a second counter 221 count the clock of a 5 MHz clock signal. A pulse determining part 22 makes a backlight ON/OFF instruction signal into a low level, when the value of the counter of the first counter 220 reaches a reference value for turning off the backlight, because a 2ms pulse signal is not outputted and makes a PLL drive and stop signal into the low level, when the value of the counter of the first counter 220 reaches a reference value for stopping a PLL. The pulse determining part 22 makes the PLL stop and drive signal into a high level, when the output of the 2ms pulse signal is resumed and the value of the counter of the second counter 221 reaches a reference value for starting a PLL operation and makes the backlight ON/OFF instruction signal into the high level, when the value of the counter of the second counter 221 reaches a reference value for turning on the backlight. COPYRIGHT: (C)2011,JPO&INPIT