STATIC RANDOM ACCESS MEMORY (SRAM) CELL AND METHOD FOR FORMING THE SAME
PROBLEM TO BE SOLVED: To provide a static random access memory (SRAM) cell and a method for forming the same. SOLUTION: The static random access memory (SRAM) cell includes active areas of a plurality of transistors. The longitudinal axes of the active areas of the transistors are all parallel. A fi...
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creator | WANG PING-WEI YANG LIE-YONG CHANG FENG-MING YANG CHANG-TA |
description | PROBLEM TO BE SOLVED: To provide a static random access memory (SRAM) cell and a method for forming the same. SOLUTION: The static random access memory (SRAM) cell includes active areas of a plurality of transistors. The longitudinal axes of the active areas of the transistors are all parallel. A first linear intra-cell connection electrically couples the active area of a first pull-down transistor PD-1, the active area of a first pull-up transistor PU-1, and the active area of a first pass-gate transistor PG-1 to a gate electrode 118 of a second pull-down transistor PD-2 and a gate electrode 116 of a second pull-up transistor PU-2. A second linear intra-cell connection electrically couples the active area of the second pull-down transistor PD-2, the active area of the second pull-up transistor PU-2, and the active area of a second pass-gate transistor PG-2 to a gate electrode 112 of the first pull-down transistor PD-1 and a gate electrode 110 of the first pull-up transistor PU-1. COPYRIGHT: (C)2011,JPO&INPIT |
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SOLUTION: The static random access memory (SRAM) cell includes active areas of a plurality of transistors. The longitudinal axes of the active areas of the transistors are all parallel. A first linear intra-cell connection electrically couples the active area of a first pull-down transistor PD-1, the active area of a first pull-up transistor PU-1, and the active area of a first pass-gate transistor PG-1 to a gate electrode 118 of a second pull-down transistor PD-2 and a gate electrode 116 of a second pull-up transistor PU-2. A second linear intra-cell connection electrically couples the active area of the second pull-down transistor PD-2, the active area of the second pull-up transistor PU-2, and the active area of a second pass-gate transistor PG-2 to a gate electrode 112 of the first pull-down transistor PD-1 and a gate electrode 110 of the first pull-up transistor PU-1. COPYRIGHT: (C)2011,JPO&INPIT</abstract><oa>free_for_read</oa></addata></record> |
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title | STATIC RANDOM ACCESS MEMORY (SRAM) CELL AND METHOD FOR FORMING THE SAME |
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