SOLID-STATE IMAGING APPARATUS

SOLID-STATE IMAGING APPARATUS

PROBLEM TO BE SOLVED: To easily select an optional line, in a CMOS image sensor. SOLUTION: For example, two electronic shutter vertical shift register circuits A20, B21 of the same configuration are prepared for a vertical shift register circuit 17, that a CMOS image sensor includes, for achieving &...

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Hauptverfasser: MORISAKI MOTOHIRO, NAKANO TEPPEI
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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NAKANO TEPPEI
description PROBLEM TO BE SOLVED: To easily select an optional line, in a CMOS image sensor. SOLUTION: For example, two electronic shutter vertical shift register circuits A20, B21 of the same configuration are prepared for a vertical shift register circuit 17, that a CMOS image sensor includes, for achieving "thinning" and "pixel averaging" for pixels (signal charges) in a vertical direction of an imaging area or "segmentation" for pixels in an optional range. By controlling the number and the timing of clock signals to be input to the electronic shutter vertical shift register circuits A20, B21, a reduction ratio in "thinning", the average number of pixels in "pixel averaging" and a range of segmentation in "segmentation" are freely changed only by preparing the two electronic shutter vertical shift register circuits A20, B21. COPYRIGHT: (C)2010,JPO&INPIT
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
title SOLID-STATE IMAGING APPARATUS
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