INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide integrated circuit which can use LSI tester to discriminate holding defect from stack fault. SOLUTION: The integrated circuit includes a 1st latch of data source and a 2nd latch of data sink. In this integrated circuit, a 2nd latch 20 is provided with a resistor elem...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KONMOTO AKIHIKO, OTAKE KOJI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide integrated circuit which can use LSI tester to discriminate holding defect from stack fault. SOLUTION: The integrated circuit includes a 1st latch of data source and a 2nd latch of data sink. In this integrated circuit, a 2nd latch 20 is provided with a resistor element 28 which delays data D2in output and propagated from the 1st latch, and a path switching circuit 29, comprising an inverter 29_1, transmission gates 29_2 and 29_3 which switches signal input route so as to make the resistor element 28 bypass so as to fetch the data D2in during normal operations, while fetching data D2', is delayed via the resistor element 28 in test operation. COPYRIGHT: (C)2008,JPO&INPIT