VERIFICATION SYSTEM

VERIFICATION SYSTEM

PROBLEM TO BE SOLVED: To execute a test by an active unit without deteriorating throughput of the whole system while executing applications by the active unit in a system having a large scale server device. SOLUTION: This verification system for verifying functions of a plurality of server devices w...

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Hauptverfasser: SUGITA YUMIKO, SUMIYA YUJI
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator SUGITA YUMIKO
SUMIYA YUJI
description PROBLEM TO BE SOLVED: To execute a test by an active unit without deteriorating throughput of the whole system while executing applications by the active unit in a system having a large scale server device. SOLUTION: This verification system for verifying functions of a plurality of server devices which execute applications is provided with a load balancing device, an input parallel device and an output collation device. The load balancing device transmits input generated by a client device to any of the plurality of server devices. An active server device for verifying the functions is selected from among the plurality of server devices and a verification server device is provided for verifying the functions. Then, the input parallel device transmits input with the same contents to the active server device and the verification server device, makes each of the server devices execute same applications to collate respective pieces of output data by an output collation device. COPYRIGHT: (C)2008,JPO&INPIT
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SOLUTION: This verification system for verifying functions of a plurality of server devices which execute applications is provided with a load balancing device, an input parallel device and an output collation device. The load balancing device transmits input generated by a client device to any of the plurality of server devices. An active server device for verifying the functions is selected from among the plurality of server devices and a verification server device is provided for verifying the functions. Then, the input parallel device transmits input with the same contents to the active server device and the verification server device, makes each of the server devices execute same applications to collate respective pieces of output data by an output collation device. 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COPYRIGHT: (C)2008,JPO&amp;INPIT</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAOcw3ydPN0dgzx9PdTCI4MDnH15WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYG5kam5qYWFo7GRCkCAKvUHw4</recordid><startdate>20071004</startdate><enddate>20071004</enddate><creator>SUGITA YUMIKO</creator><creator>SUMIYA YUJI</creator><scope>EVB</scope></search><sort><creationdate>20071004</creationdate><title>VERIFICATION SYSTEM</title><author>SUGITA YUMIKO ; SUMIYA YUJI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2007257588A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SUGITA YUMIKO</creatorcontrib><creatorcontrib>SUMIYA YUJI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUGITA YUMIKO</au><au>SUMIYA YUJI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>VERIFICATION SYSTEM</title><date>2007-10-04</date><risdate>2007</risdate><abstract>PROBLEM TO BE SOLVED: To execute a test by an active unit without deteriorating throughput of the whole system while executing applications by the active unit in a system having a large scale server device. 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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title VERIFICATION SYSTEM
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