READ-OUT CIRCUIT OF MAGNETIC SEMICONDUCTOR STORAGE DEVICE
PROBLEM TO BE SOLVED: To provide a read-out circuit of a magnetic semiconductor storage device achieving high-speed operation with a small area and low power consumption. SOLUTION: The read-out circuit 1 reads information stored in a memory cell with an MTJ element 40 having a 70% or more MR ratio,...
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creator | KIMURA TOKUJI |
description | PROBLEM TO BE SOLVED: To provide a read-out circuit of a magnetic semiconductor storage device achieving high-speed operation with a small area and low power consumption. SOLUTION: The read-out circuit 1 reads information stored in a memory cell with an MTJ element 40 having a 70% or more MR ratio, and is configured to comprise: an nMOSFET 10 provided with a source terminal 10S which is grounded through the MTJ element 40 and to which a data voltage generated at the MTJ 40 is applied, a gate terminal 10g to which a constant voltage is applied, and a drain terminal 10d which outputs an output voltage amplified from the data voltage so as to drive an external output circuit; and a pMOSFET 12 which is provided with a drain terminal 12d connected to the drain terminal 10d of the nMODFET 10, a gate terminal 12g to which the constant voltage is applied, and a source terminal 12s to which a power supply voltage is applied, and supplies current to the nMOSFET 10. COPYRIGHT: (C)2007,JPO&INPIT |
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SOLUTION: The read-out circuit 1 reads information stored in a memory cell with an MTJ element 40 having a 70% or more MR ratio, and is configured to comprise: an nMOSFET 10 provided with a source terminal 10S which is grounded through the MTJ element 40 and to which a data voltage generated at the MTJ 40 is applied, a gate terminal 10g to which a constant voltage is applied, and a drain terminal 10d which outputs an output voltage amplified from the data voltage so as to drive an external output circuit; and a pMOSFET 12 which is provided with a drain terminal 12d connected to the drain terminal 10d of the nMODFET 10, a gate terminal 12g to which the constant voltage is applied, and a source terminal 12s to which a power supply voltage is applied, and supplies current to the nMOSFET 10. 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SOLUTION: The read-out circuit 1 reads information stored in a memory cell with an MTJ element 40 having a 70% or more MR ratio, and is configured to comprise: an nMOSFET 10 provided with a source terminal 10S which is grounded through the MTJ element 40 and to which a data voltage generated at the MTJ 40 is applied, a gate terminal 10g to which a constant voltage is applied, and a drain terminal 10d which outputs an output voltage amplified from the data voltage so as to drive an external output circuit; and a pMOSFET 12 which is provided with a drain terminal 12d connected to the drain terminal 10d of the nMODFET 10, a gate terminal 12g to which the constant voltage is applied, and a source terminal 12s to which a power supply voltage is applied, and supplies current to the nMOSFET 10. COPYRIGHT: (C)2007,JPO&INPIT</abstract><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | READ-OUT CIRCUIT OF MAGNETIC SEMICONDUCTOR STORAGE DEVICE |
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