SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To restrain the peeling of an interlayer film caused by the weakness of adhesion strength of the interlayer film and by any damage in dicing, and to estimate and analyze whether the peeling of the interlayer film has occurred. SOLUTION: A semiconductor device is configured in a...

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1. Verfasser:	INODO HIDEKAZU
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	INODO HIDEKAZU
description	PROBLEM TO BE SOLVED: To restrain the peeling of an interlayer film caused by the weakness of adhesion strength of the interlayer film and by any damage in dicing, and to estimate and analyze whether the peeling of the interlayer film has occurred. SOLUTION: A semiconductor device is configured in a way that a plurality of reinforcing patterns 20 each having a multilayer wiring structure are formed concentrically on a plane on a periphery of an element region of a semiconductor chip 10 having a multilayer wiring structure. In the semiconductor device, a reinforcing pattern at least on the innermost side is formed with wiring of each layer in the multilayer wiring structure and a via-hole between the layers being divided in lengthwise directions thereof. The device has a stacked chain structure where the divided wiring and the via are connected in series so as to form one wiring passage as a whole stereoscopically. Further, the device includes a pair of pad electrodes 21 corresponding to opposite ends of the wiring path of the uppermost layer wiring. COPYRIGHT: (C)2007,JPO&INPIT
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SOLUTION: A semiconductor device is configured in a way that a plurality of reinforcing patterns 20 each having a multilayer wiring structure are formed concentrically on a plane on a periphery of an element region of a semiconductor chip 10 having a multilayer wiring structure. In the semiconductor device, a reinforcing pattern at least on the innermost side is formed with wiring of each layer in the multilayer wiring structure and a via-hole between the layers being divided in lengthwise directions thereof. The device has a stacked chain structure where the divided wiring and the via are connected in series so as to form one wiring passage as a whole stereoscopically. Further, the device includes a pair of pad electrodes 21 corresponding to opposite ends of the wiring path of the uppermost layer wiring. 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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	SEMICONDUCTOR DEVICE
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