SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of changing a connection of a circuit by a reconstituting interconnection layer, reducing an arrangement area of a fuse element to reduce a semiconductor chip size, reducing the manufacturing step, and effic...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SUGAI TAKAYASU, SASAKI KATSURO, HORIUCHI HITOSHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SUGAI TAKAYASU
SASAKI KATSURO
HORIUCHI HITOSHI
description PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of changing a connection of a circuit by a reconstituting interconnection layer, reducing an arrangement area of a fuse element to reduce a semiconductor chip size, reducing the manufacturing step, and efficiently conducting a bail-out arrangement. SOLUTION: The semiconductor device with a preliminary circuit formed on the semiconductor chip conducts the bail-out arrangement with changing the preliminary circuit connection. The semiconductor chip and an external terminal of the semiconductor device are connected by the reconstituting interconnection layer, and the change in the connection of the preliminary circuit is conducted by changing the pattern of the reconstituting interconnection layer. The method for manufacturing the semiconductor device comprises the steps of inspecting the circuit formed with the connection of the semiconductor chip and the external terminal of the semiconductor device by the reconstituting interconnection layer, and changing the connection of the circuit determined as defects by the inspection to the preliminary circuit by changing the pattern of the reconstituting layer to conduct the bail-out. COPYRIGHT: (C)2007,JPO&INPIT
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2007059700A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2007059700A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2007059700A3</originalsourceid><addsrcrecordid>eNrjZDAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8AwJVvB19At1c3QOCQ3y9HNX8HUN8fB34WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYG5gamluYGBo7GRCkCAKkXJw8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><source>esp@cenet</source><creator>SUGAI TAKAYASU ; SASAKI KATSURO ; HORIUCHI HITOSHI</creator><creatorcontrib>SUGAI TAKAYASU ; SASAKI KATSURO ; HORIUCHI HITOSHI</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of changing a connection of a circuit by a reconstituting interconnection layer, reducing an arrangement area of a fuse element to reduce a semiconductor chip size, reducing the manufacturing step, and efficiently conducting a bail-out arrangement. SOLUTION: The semiconductor device with a preliminary circuit formed on the semiconductor chip conducts the bail-out arrangement with changing the preliminary circuit connection. The semiconductor chip and an external terminal of the semiconductor device are connected by the reconstituting interconnection layer, and the change in the connection of the preliminary circuit is conducted by changing the pattern of the reconstituting interconnection layer. The method for manufacturing the semiconductor device comprises the steps of inspecting the circuit formed with the connection of the semiconductor chip and the external terminal of the semiconductor device by the reconstituting interconnection layer, and changing the connection of the circuit determined as defects by the inspection to the preliminary circuit by changing the pattern of the reconstituting layer to conduct the bail-out. COPYRIGHT: (C)2007,JPO&amp;INPIT</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070308&amp;DB=EPODOC&amp;CC=JP&amp;NR=2007059700A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070308&amp;DB=EPODOC&amp;CC=JP&amp;NR=2007059700A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SUGAI TAKAYASU</creatorcontrib><creatorcontrib>SASAKI KATSURO</creatorcontrib><creatorcontrib>HORIUCHI HITOSHI</creatorcontrib><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><description>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of changing a connection of a circuit by a reconstituting interconnection layer, reducing an arrangement area of a fuse element to reduce a semiconductor chip size, reducing the manufacturing step, and efficiently conducting a bail-out arrangement. SOLUTION: The semiconductor device with a preliminary circuit formed on the semiconductor chip conducts the bail-out arrangement with changing the preliminary circuit connection. The semiconductor chip and an external terminal of the semiconductor device are connected by the reconstituting interconnection layer, and the change in the connection of the preliminary circuit is conducted by changing the pattern of the reconstituting interconnection layer. The method for manufacturing the semiconductor device comprises the steps of inspecting the circuit formed with the connection of the semiconductor chip and the external terminal of the semiconductor device by the reconstituting interconnection layer, and changing the connection of the circuit determined as defects by the inspection to the preliminary circuit by changing the pattern of the reconstituting layer to conduct the bail-out. COPYRIGHT: (C)2007,JPO&amp;INPIT</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8AwJVvB19At1c3QOCQ3y9HNX8HUN8fB34WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYG5gamluYGBo7GRCkCAKkXJw8</recordid><startdate>20070308</startdate><enddate>20070308</enddate><creator>SUGAI TAKAYASU</creator><creator>SASAKI KATSURO</creator><creator>HORIUCHI HITOSHI</creator><scope>EVB</scope></search><sort><creationdate>20070308</creationdate><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><author>SUGAI TAKAYASU ; SASAKI KATSURO ; HORIUCHI HITOSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2007059700A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>SUGAI TAKAYASU</creatorcontrib><creatorcontrib>SASAKI KATSURO</creatorcontrib><creatorcontrib>HORIUCHI HITOSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUGAI TAKAYASU</au><au>SASAKI KATSURO</au><au>HORIUCHI HITOSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><date>2007-03-08</date><risdate>2007</risdate><abstract>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of changing a connection of a circuit by a reconstituting interconnection layer, reducing an arrangement area of a fuse element to reduce a semiconductor chip size, reducing the manufacturing step, and efficiently conducting a bail-out arrangement. SOLUTION: The semiconductor device with a preliminary circuit formed on the semiconductor chip conducts the bail-out arrangement with changing the preliminary circuit connection. The semiconductor chip and an external terminal of the semiconductor device are connected by the reconstituting interconnection layer, and the change in the connection of the preliminary circuit is conducted by changing the pattern of the reconstituting interconnection layer. The method for manufacturing the semiconductor device comprises the steps of inspecting the circuit formed with the connection of the semiconductor chip and the external terminal of the semiconductor device by the reconstituting interconnection layer, and changing the connection of the circuit determined as defects by the inspection to the preliminary circuit by changing the pattern of the reconstituting layer to conduct the bail-out. COPYRIGHT: (C)2007,JPO&amp;INPIT</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JP2007059700A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
title SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T14%3A38%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SUGAI%20TAKAYASU&rft.date=2007-03-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2007059700A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true