TESTING DEVICE AND TESTING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To enable test of a tested circuit such as a memory or an analog circuit that cannot be scanned, an input/output circuit, and a signal line between the input/output circuit and tested circuit. SOLUTION: A test device 1 of a semiconductor integrated circuit comprises the input/o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: KAMATA TETSUO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!