FUNCTIONAL ELEMENT AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To reduce cost by miniaturizing a chip size and improving defect rate with simple process. SOLUTION: Many pieces of chip elements 3 and wiring patterns 7 are formed on a wafer 30, and the wafer is diced after a cap substrate 4 is mounted opposed to each chip element through a j...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	OYA YOICHI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS RESONATORS SEMICONDUCTOR DEVICES TRANSPORTING
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