SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To simultaneously conduct writing and reading for a plurality of memory chips during a test mode and to reduce testing time of the plurality of the memory chips by improving bus efficiency of the chips without newly providing a dedicated external terminal. SOLUTION: In a multi-chip package type semiconductor memory, a plurality of same kind of memory semiconductor chips 11 are stored in a single package and the same number of external terminals 13 as pads 12 of each chip 11 are commonly connected to the corresponding pads of each chip 11. Each chip is provided with a mode control circuit 14 which is used to set a normal utilization mode or a test mode and an internal control circuit 15a or 15b which receives an external control signal and divides the chip into a first cell region and a second cell region and has a reading/writing control function to control the first cell region and the second cell region of the chip so that one cell region conducts a reading operation and the other cell conducts a writing operation. COPYRIGHT: (C)2006,JPO&NCIPI