SEMICONDUCTOR ELEMENT AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a semiconductor element where metallic resistance is suitably formed and a contact hole where contact wiring is provided is formed to be narrow. SOLUTION: The semiconductor element 1 is provided with an HBT 3 and insulation layers 11 and 13. In the semiconductor elem...

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description PROBLEM TO BE SOLVED: To provide a semiconductor element where metallic resistance is suitably formed and a contact hole where contact wiring is provided is formed to be narrow. SOLUTION: The semiconductor element 1 is provided with an HBT 3 and insulation layers 11 and 13. In the semiconductor element 1, the insulation layers 11 and 13 are formed so that the etching speed of the insulation layer 13 may be higher than that of the insulation layer 11 on the same etching condition. Consequently, at the same time of suppressing an etching quantity in the depthwise direction of a cavity 15, a side etch quantity can be increased. On the other hand, the side etch quantity of a contact hole 17 on the HBT 3 can be reduced. COPYRIGHT: (C)2005,JPO&NCIPI
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SOLUTION: The semiconductor element 1 is provided with an HBT 3 and insulation layers 11 and 13. In the semiconductor element 1, the insulation layers 11 and 13 are formed so that the etching speed of the insulation layer 13 may be higher than that of the insulation layer 11 on the same etching condition. Consequently, at the same time of suppressing an etching quantity in the depthwise direction of a cavity 15, a side etch quantity can be increased. On the other hand, the side etch quantity of a contact hole 17 on the HBT 3 can be reduced. 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SOLUTION: The semiconductor element 1 is provided with an HBT 3 and insulation layers 11 and 13. In the semiconductor element 1, the insulation layers 11 and 13 are formed so that the etching speed of the insulation layer 13 may be higher than that of the insulation layer 11 on the same etching condition. Consequently, at the same time of suppressing an etching quantity in the depthwise direction of a cavity 15, a side etch quantity can be increased. On the other hand, the side etch quantity of a contact hole 17 on the HBT 3 can be reduced. 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SOLUTION: The semiconductor element 1 is provided with an HBT 3 and insulation layers 11 and 13. In the semiconductor element 1, the insulation layers 11 and 13 are formed so that the etching speed of the insulation layer 13 may be higher than that of the insulation layer 11 on the same etching condition. Consequently, at the same time of suppressing an etching quantity in the depthwise direction of a cavity 15, a side etch quantity can be increased. On the other hand, the side etch quantity of a contact hole 17 on the HBT 3 can be reduced. COPYRIGHT: (C)2005,JPO&amp;NCIPI</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR ELEMENT AND METHOD OF MANUFACTURING THE SAME
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